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boards: x86: add pci controller node with acpi pnp id

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add acpi pnp/hw id for pcie node to enable support for retreive
interrupt routing information for pci legacy interrupt via acpi

Signed-off-by: Najumon B.A <najumon.ba@intel.com>
This commit is contained in:
Najumon B.A 2023-10-31 19:24:38 +05:30 committed by Carles Cufí
parent 2f3fb49d76
commit 940c66f82e
9 changed files with 12 additions and 14 deletions
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2
boards/x86/intel_adl/Kconfig.defconfig
View File

@ -37,8 +37,6 @@ config HEAP_MEM_POOL_ADD_SIZE_ACPI
default 64000000
config MAIN_STACK_SIZE
default 320000
config ACPI_PRT_BUS_NAME
default "_SB.PC00"
if SHELL
config SHELL_STACK_SIZE

4
boards/x86/intel_ehl/Kconfig.defconfig
View File

@ -19,10 +19,6 @@ config SHELL_BACKEND_SERIAL_INTERRUPT_DRIVEN
default n
endif
config ACPI_PRT_BUS_NAME
depends on ACPI
default "_SB.PC00"
config HEAP_MEM_POOL_ADD_SIZE_ACPI
default 2097152
depends on ACPI

2
boards/x86/intel_rpl/Kconfig.defconfig
View File

@ -36,8 +36,6 @@ config HEAP_MEM_POOL_ADD_SIZE_ACPI
default 64000000
config MAIN_STACK_SIZE
default 320000
config ACPI_PRT_BUS_NAME
default "_SB.PC00"
if SHELL
config SHELL_STACK_SIZE

3
boards/x86/qemu_x86/qemu_x86.dts
View File

@ -49,7 +49,8 @@
pcie0: pcie0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "intel,pcie";
compatible = "pcie-controller";
acpi-hid = "PNP0A08";
ranges;
can0: can0 {

3
dts/x86/intel/alder_lake.dtsi
View File

@ -48,7 +48,8 @@
pcie0: pcie0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "intel,pcie";
compatible = "pcie-controller";
acpi-hid = "PNP0A08";
ranges;
smbus0: smbus0 {

3
dts/x86/intel/apollo_lake.dtsi
View File

@ -47,7 +47,8 @@
pcie0: pcie0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "intel,pcie";
compatible = "pcie-controller";
acpi-hid = "PNP0A08";
ranges;
uart0: uart0 {

3
dts/x86/intel/elkhart_lake.dtsi
View File

@ -52,7 +52,8 @@
pcie0: pcie0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "intel,pcie";
compatible = "pcie-controller";
acpi-hid = "PNP0A08";
ranges;
ptm_root0: ptm_root0 {

3
dts/x86/intel/raptor_lake_p.dtsi
View File

@ -43,9 +43,10 @@
};
pcie0: pcie0 {
compatible = "intel,pcie";
compatible = "pcie-controller";
#address-cells = <1>;
#size-cells = <1>;
acpi-hid = "PNP0A08";
ranges;
smbus0: smbus0 {

3
dts/x86/intel/raptor_lake_s.dtsi
View File

@ -47,7 +47,8 @@
pcie0: pcie0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "intel,pcie";
compatible = "pcie-controller";
acpi-hid = "PNP0A08";
ranges;
smbus0: smbus0 {