From 8cdc822954c8a693f9c3e57ff825c585ef8d21cd Mon Sep 17 00:00:00 2001
From: Wouter Cappelle <wouter.cappelle@crodeon.com>
Date: Fri, 15 Oct 2021 10:43:47 +0200
Subject: [PATCH] dts: arm: Add devicetree files for STM32L010xB series
 microcontrollers

This PR adds the devicetree file for supporting the STM32L010xB mcu.

Signed-off-by: Wouter Cappelle <wouter.cappelle@crodeon.com>
---
 dts/arm/st/l0/stm32l0.dtsi                    |  9 -----
 .../st/l0/{stm32l011.dtsi => stm32l010.dtsi}  |  0
 dts/arm/st/l0/stm32l010Xb.dtsi                | 40 +++++++++++++++++++
 dts/arm/st/l0/stm32l011X4.dtsi                |  2 +-
 dts/arm/st/l0/stm32l053.dtsi                  | 11 ++++-
 dts/arm/st/l0/stm32l072.dtsi                  |  9 +++++
 .../stm32l0/Kconfig.defconfig.stm32l010xb     | 14 +++++++
 soc/arm/st_stm32/stm32l0/Kconfig.soc          |  3 ++
 8 files changed, 77 insertions(+), 11 deletions(-)
 rename dts/arm/st/l0/{stm32l011.dtsi => stm32l010.dtsi} (100%)
 create mode 100644 dts/arm/st/l0/stm32l010Xb.dtsi
 create mode 100644 soc/arm/st_stm32/stm32l0/Kconfig.defconfig.stm32l010xb

diff --git a/dts/arm/st/l0/stm32l0.dtsi b/dts/arm/st/l0/stm32l0.dtsi
index 25a99de2d12..1dac27bfb5a 100644
--- a/dts/arm/st/l0/stm32l0.dtsi
+++ b/dts/arm/st/l0/stm32l0.dtsi
@@ -285,15 +285,6 @@
 			#io-channel-cells = <1>;
 		};
 
-		dac1: dac@40007400 {
-			compatible = "st,stm32-dac";
-			reg = <0x40007400 0x400>;
-			clocks = <&rcc STM32_CLOCK_BUS_APB1 0x20000000>;
-			status = "disabled";
-			label = "DAC_1";
-			#io-channel-cells = <1>;
-		};
-
 		dma1: dma@40020000 {
 			compatible = "st,stm32-dma-v2";
 			#dma-cells = <3>;
diff --git a/dts/arm/st/l0/stm32l011.dtsi b/dts/arm/st/l0/stm32l010.dtsi
similarity index 100%
rename from dts/arm/st/l0/stm32l011.dtsi
rename to dts/arm/st/l0/stm32l010.dtsi
diff --git a/dts/arm/st/l0/stm32l010Xb.dtsi b/dts/arm/st/l0/stm32l010Xb.dtsi
new file mode 100644
index 00000000000..236f574520c
--- /dev/null
+++ b/dts/arm/st/l0/stm32l010Xb.dtsi
@@ -0,0 +1,40 @@
+/*
+ * Copyright (c) 2021 Wouter Cappelle <wouter.cappelle@crodeon.com>
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <mem.h>
+#include <st/l0/stm32l010.dtsi>
+
+/ {
+	sram0: memory@20000000 {
+		reg = <0x20000000 DT_SIZE_K(20)>;
+	};
+
+	soc {
+		flash-controller@40022000 {
+			flash0: flash@8000000 {
+				reg = <0x08000000 DT_SIZE_K(128)>;
+			};
+		};
+
+		timers22: timers@40011400 {
+			compatible = "st,stm32-timers";
+			reg = <0x40011400 0x400>;
+			clocks = <&rcc STM32_CLOCK_BUS_APB2 0x00000020>;
+			interrupts = <22 0>;
+			interrupt-names = "global";
+			status = "disabled";
+			label = "TIMERS_22";
+
+			pwm {
+				compatible = "st,stm32-pwm";
+				status = "disabled";
+				st,prescaler = <0>;
+				label = "PWM_22";
+				#pwm-cells = <3>;
+			};
+		};
+	};
+};
diff --git a/dts/arm/st/l0/stm32l011X4.dtsi b/dts/arm/st/l0/stm32l011X4.dtsi
index e0dc8878146..e42fa1af64c 100644
--- a/dts/arm/st/l0/stm32l011X4.dtsi
+++ b/dts/arm/st/l0/stm32l011X4.dtsi
@@ -5,7 +5,7 @@
  */
 
 #include <mem.h>
-#include <st/l0/stm32l011.dtsi>
+#include <st/l0/stm32l010.dtsi>
 
 / {
 	sram0: memory@20000000 {
diff --git a/dts/arm/st/l0/stm32l053.dtsi b/dts/arm/st/l0/stm32l053.dtsi
index c0ceec79a5e..c3c45fd9581 100644
--- a/dts/arm/st/l0/stm32l053.dtsi
+++ b/dts/arm/st/l0/stm32l053.dtsi
@@ -19,7 +19,16 @@
 			phys = <&otgfs_phy>;
 			clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00800000>;
 			status = "disabled";
-			label= "USB";
+			label = "USB";
+		};
+
+		dac1: dac@40007400 {
+			compatible = "st,stm32-dac";
+			reg = <0x40007400 0x400>;
+			clocks = <&rcc STM32_CLOCK_BUS_APB1 0x20000000>;
+			status = "disabled";
+			label = "DAC_1";
+			#io-channel-cells = <1>;
 		};
 
 		otgfs_phy: otgfs_phy {
diff --git a/dts/arm/st/l0/stm32l072.dtsi b/dts/arm/st/l0/stm32l072.dtsi
index 6c5c7c120fd..87710a49faf 100644
--- a/dts/arm/st/l0/stm32l072.dtsi
+++ b/dts/arm/st/l0/stm32l072.dtsi
@@ -41,4 +41,13 @@
 		#phy-cells = <0>;
 		label = "OTGFS_PHY";
 	};
+
+	dac1: dac@40007400 {
+		compatible = "st,stm32-dac";
+		reg = <0x40007400 0x400>;
+		clocks = <&rcc STM32_CLOCK_BUS_APB1 0x20000000>;
+		status = "disabled";
+		label = "DAC_1";
+		#io-channel-cells = <1>;
+	};
 };
diff --git a/soc/arm/st_stm32/stm32l0/Kconfig.defconfig.stm32l010xb b/soc/arm/st_stm32/stm32l0/Kconfig.defconfig.stm32l010xb
new file mode 100644
index 00000000000..d447e92f4e0
--- /dev/null
+++ b/soc/arm/st_stm32/stm32l0/Kconfig.defconfig.stm32l010xb
@@ -0,0 +1,14 @@
+# ST Microelectronics STM32L010XX MCU
+#
+# Copyright (c) 2021 Wouter Cappelle <wouter.cappelle@crodeon.com>
+# SPDX-License-Identifier: Apache-2.0
+
+if SOC_STM32L010XB
+
+config SOC
+	default "stm32l010xb"
+
+config NUM_IRQS
+	default 32
+
+endif # SOC_STM32L010XB
diff --git a/soc/arm/st_stm32/stm32l0/Kconfig.soc b/soc/arm/st_stm32/stm32l0/Kconfig.soc
index 05b12fe5e31..42d49fde84e 100644
--- a/soc/arm/st_stm32/stm32l0/Kconfig.soc
+++ b/soc/arm/st_stm32/stm32l0/Kconfig.soc
@@ -9,6 +9,9 @@ choice
 	prompt "STM32L0x MCU Selection"
 	depends on SOC_SERIES_STM32L0X
 
+config SOC_STM32L010XB
+	bool "STM32L010XB"
+
 config SOC_STM32L011XX
 	bool "STM32L011XX"