From 8098ecbc02ce29bb4e1065fc5e3c019186e2230d Mon Sep 17 00:00:00 2001 From: Alexandre Bourdiol Date: Fri, 31 Jul 2020 16:36:46 +0200 Subject: [PATCH] boards: arm: nucleo_g071rb enable PWM Tested with tests/drivers/pwm/pwm_api/ (requires https://github.com/zephyrproject-rtos/zephyr/pull/27204) and with oscillo. Signed-off-by: Alexandre Bourdiol --- boards/arm/nucleo_g071rb/doc/index.rst | 3 +++ boards/arm/nucleo_g071rb/nucleo_g071rb.dts | 7 +++++++ boards/arm/nucleo_g071rb/nucleo_g071rb.yaml | 1 + boards/arm/nucleo_g071rb/pinmux.c | 3 +++ drivers/pinmux/stm32/pinmux_stm32g0.h | 3 +++ 5 files changed, 17 insertions(+) diff --git a/boards/arm/nucleo_g071rb/doc/index.rst b/boards/arm/nucleo_g071rb/doc/index.rst index 5bf6acfc236..b0bc8ea947c 100644 --- a/boards/arm/nucleo_g071rb/doc/index.rst +++ b/boards/arm/nucleo_g071rb/doc/index.rst @@ -98,6 +98,8 @@ The Zephyr nucleo_g071rb board configuration supports the following hardware fea +-----------+------------+-------------------------------------+ | WATCHDOG | on-chip | independent watchdog | +-----------+------------+-------------------------------------+ +| PWM | on-chip | pwm | ++-----------+------------+-------------------------------------+ Other hardware features are not yet supported in this Zephyr port. @@ -119,6 +121,7 @@ Default Zephyr Peripheral Mapping: - UART_2 TX/RX : PA2/PA3 (ST-Link Virtual Port Com) - USER_PB : PC13 - LD4 : PA5 +- PWM : PA6 For mode details please refer to `STM32 Nucleo-64 board User Manual`_. diff --git a/boards/arm/nucleo_g071rb/nucleo_g071rb.dts b/boards/arm/nucleo_g071rb/nucleo_g071rb.dts index add420d9592..98bfe0d4823 100644 --- a/boards/arm/nucleo_g071rb/nucleo_g071rb.dts +++ b/boards/arm/nucleo_g071rb/nucleo_g071rb.dts @@ -50,3 +50,10 @@ &iwdg { status = "okay"; }; + +&timers3 { + status = "okay"; + pwm3: pwm { + status = "okay"; + }; +}; diff --git a/boards/arm/nucleo_g071rb/nucleo_g071rb.yaml b/boards/arm/nucleo_g071rb/nucleo_g071rb.yaml index 67ed6be3622..2f690dae313 100644 --- a/boards/arm/nucleo_g071rb/nucleo_g071rb.yaml +++ b/boards/arm/nucleo_g071rb/nucleo_g071rb.yaml @@ -13,3 +13,4 @@ supported: - uart - gpio - watchdog + - pwm diff --git a/boards/arm/nucleo_g071rb/pinmux.c b/boards/arm/nucleo_g071rb/pinmux.c index 4f45c5ebe75..647da76e722 100644 --- a/boards/arm/nucleo_g071rb/pinmux.c +++ b/boards/arm/nucleo_g071rb/pinmux.c @@ -19,6 +19,9 @@ static const struct pin_config pinconf[] = { {STM32_PIN_PA2, STM32G0_PINMUX_FUNC_PA2_USART2_TX}, {STM32_PIN_PA3, STM32G0_PINMUX_FUNC_PA3_USART2_RX}, #endif +#if DT_NODE_HAS_STATUS(DT_NODELABEL(pwm3), okay) && CONFIG_SERIAL + {STM32_PIN_PA6, STM32G0_PINMUX_FUNC_PA6_PWM3_CH1}, +#endif }; static int pinmux_stm32_init(struct device *port) diff --git a/drivers/pinmux/stm32/pinmux_stm32g0.h b/drivers/pinmux/stm32/pinmux_stm32g0.h index 21374d39ab0..c7e17598fac 100644 --- a/drivers/pinmux/stm32/pinmux_stm32g0.h +++ b/drivers/pinmux/stm32/pinmux_stm32g0.h @@ -28,4 +28,7 @@ #define STM32G0_PINMUX_FUNC_PA7_TIM3_CH2 \ (STM32_PINMUX_ALT_FUNC_1 | STM32_PUSHPULL_NOPULL) +#define STM32G0_PINMUX_FUNC_PA6_PWM3_CH1 \ + (STM32_PINMUX_ALT_FUNC_1 | STM32_PUSHPULL_NOPULL) + #endif /* ZEPHYR_DRIVERS_PINMUX_STM32_PINMUX_STM32G0_H_ */