tests: arch: arm: update for MPS4 Corstone315

DT config for MPS4 corstone315 boards which can be tested with simulation.
Creates a custom section in the unused SRAM region. Executing code
in this region in privileged mode will result in an MPU fault while,
execution in unprivileged mode should work fine.

Signed-off-by: Shaunak saha <ssaha@tsavoritesi.com>
This commit is contained in:
Shaunak saha 2025-06-16 14:58:05 -07:00 committed by Daniel DeGrasse
parent 335960e4f9
commit 7bc5ef87cf
5 changed files with 32 additions and 0 deletions

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@ -9,4 +9,5 @@ tests:
platform_exclude:
- mps3/corstone310/an555
- mps3/corstone310/fvp
- mps4/corstone315/fvp
- mps4/corstone320/fvp

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@ -8,4 +8,5 @@ project(arm_mpu_pxn)
target_sources(app PRIVATE src/main.c)
zephyr_linker_sources_ifdef(CONFIG_SOC_MPS3_CORSTONE300 RAM_SECTIONS mps3_corstone300.ld)
zephyr_linker_sources_ifdef(CONFIG_SOC_MPS3_CORSTONE310 RAM_SECTIONS mps3_corstone310.ld)
zephyr_linker_sources_ifdef(CONFIG_SOC_MPS4_CORSTONE315 RAM_SECTIONS mps4_corstone315.ld)
zephyr_linker_sources_ifdef(CONFIG_SOC_MPS4_CORSTONE320 RAM_SECTIONS mps4_corstone320.ld)

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@ -0,0 +1,11 @@
/*
* Copyright 2025 Arm Limited and/or its affiliates <open-source-office@arm.com>
*
* SPDX-License-Identifier: Apache-2.0
*/
SECTION_DATA_PROLOGUE(.customramfunc, , )
{
*(.customramfunc) * (".customramfunc.*")
}
GROUP_DATA_LINK_IN(DTCM, DTCM)

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@ -0,0 +1,18 @@
/*
* Copyright 2025 Arm Limited and/or its affiliates <open-source-office@arm.com>
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/dt-bindings/memory-attr/memory-attr.h>
#include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h>
/ {
dtcm: dtcm@30000000 {
compatible = "zephyr,memory-region";
reg = <0x30000000 DT_SIZE_K(32)>;
zephyr,memory-region = "DTCM";
zephyr,memory-attr = <( DT_MEM_ARM(ATTR_MPU_RAM_PXN) )>;
};
};

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@ -7,6 +7,7 @@ common:
- mps3/corstone300/an547
- mps3/corstone300/fvp
- mps3/corstone310/fvp
- mps4/corstone315/fvp
- mps4/corstone320/fvp
tests:
# To verify that region marked with PXN attribute can be executed from unprivileged code