drivers: i2c: stm32: add target mode in RTIO drivers
Implement I2C target mode in STM32 I2C RTIO drivers. The implementation in respectively i2c_ll_stm32_v1_rtio.c and i2c_ll_stm32_v2_rtio.c is based on the implementation of the non-RTIO drivers, respectively i2c_ll_stm32_v1.c and i2c_ll_stm32_v2_rtio.c. Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
This commit is contained in:
Etienne Carriere
Dan Kalowsky
parent
e16c9bb41d
commit
79d1803efe
@ -114,14 +114,6 @@ struct i2c_stm32_data {
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unsigned int len;
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uint8_t *buf;
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} current;
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#ifdef CONFIG_I2C_TARGET
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bool master_active;
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struct i2c_target_config *slave_cfg;
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#ifdef CONFIG_I2C_STM32_V2
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struct i2c_target_config *slave2_cfg;
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#endif /* CONFIG_I2C_STM32_V2 */
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bool slave_attached;
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#endif /* CONFIG_I2C_TARGET */
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bool is_configured;
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bool smbalert_active;
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enum i2c_stm32_mode mode;
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@ -135,6 +127,15 @@ struct i2c_stm32_data {
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struct dma_block_config dma_blk_cfg;
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#endif /* CONFIG_I2C_STM32_V2_DMA */
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#endif /* CONFIG_I2C_RTIO */
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#ifdef CONFIG_I2C_TARGET
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bool master_active;
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bool slave_attached;
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struct i2c_target_config *slave_cfg;
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#ifdef CONFIG_I2C_STM32_V2
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struct i2c_target_config *slave2_cfg;
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#endif /* CONFIG_I2C_STM32_V2 */
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#endif /* CONFIG_I2C_TARGET */
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};
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#ifdef CONFIG_I2C_RTIO
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@ -145,13 +146,14 @@ int i2c_stm32_msg_start(const struct device *dev, uint8_t flags,
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int i2c_stm32_transaction(const struct device *dev,
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struct i2c_msg msg, uint8_t *next_msg_flags,
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uint16_t periph);
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#endif /* CONFIG_I2C_RTIO */
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int i2c_stm32_runtime_configure(const struct device *dev, uint32_t config);
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#ifdef CONFIG_I2C_TARGET
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int i2c_stm32_target_register(const struct device *dev, struct i2c_target_config *config);
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int i2c_stm32_target_unregister(const struct device *dev, struct i2c_target_config *config);
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#endif /* CONFIG_I2C_TARGET */
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#endif /* CONFIG_I2C_RTIO */
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int i2c_stm32_activate(const struct device *dev);
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int i2c_stm32_configure_timing(const struct device *dev, uint32_t clk);
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@ -40,7 +40,7 @@ LOG_MODULE_REGISTER(i2c_ll_stm32_rtio);
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#define I2C_STM32_DOMAIN_CLOCK_SUPPORT 0
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#endif
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static int i2c_stm32_do_configure(const struct device *dev, uint32_t config)
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int i2c_stm32_runtime_configure(const struct device *dev, uint32_t config)
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{
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const struct i2c_stm32_config *cfg = dev->config;
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struct i2c_stm32_data *data = dev->data;
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@ -121,7 +121,7 @@ bool i2c_stm32_start(const struct device *dev)
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return i2c_stm32_msg_start(dev, flags, (uint8_t *)sqe->tx.buf,
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sqe->tx.buf_len, dt_spec->addr);
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case RTIO_OP_I2C_CONFIGURE:
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res = i2c_stm32_do_configure(dev, sqe->i2c_config);
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res = i2c_stm32_runtime_configure(dev, sqe->i2c_config);
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return i2c_rtio_complete(data->ctx, res);
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default:
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LOG_ERR("Invalid op code %d for submission %p\n", sqe->op, (void *)sqe);
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@ -214,6 +214,10 @@ static const struct i2c_driver_api api_funcs = {
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.transfer = i2c_stm32_transfer,
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.get_config = i2c_stm32_get_config,
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.iodev_submit = i2c_stm32_submit,
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#if defined(CONFIG_I2C_TARGET)
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.target_register = i2c_stm32_target_register,
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.target_unregister = i2c_stm32_target_unregister,
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#endif
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};
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static int i2c_stm32_init(const struct device *dev)
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@ -259,7 +263,7 @@ static int i2c_stm32_init(const struct device *dev)
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bitrate_cfg = i2c_map_dt_bitrate(cfg->bitrate);
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ret = i2c_stm32_do_configure(dev, I2C_MODE_CONTROLLER | bitrate_cfg);
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ret = i2c_stm32_runtime_configure(dev, I2C_MODE_CONTROLLER | bitrate_cfg);
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if (ret < 0) {
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LOG_ERR("i2c: failure initializing");
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return ret;
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@ -71,8 +71,17 @@ static void i2c_stm32_master_mode_end(const struct device *dev, int status)
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I2C_TypeDef *i2c = cfg->i2c;
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i2c_stm32_disable_transfer_interrupts(dev);
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LL_I2C_Disable(i2c);
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#if defined(CONFIG_I2C_TARGET)
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data->master_active = false;
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if (data->slave_attached) {
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i2c_stm32_enable_transfer_interrupts(dev);
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LL_I2C_AcknowledgeNextData(i2c, LL_I2C_ACK);
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return;
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}
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#endif
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LL_I2C_Disable(i2c);
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if ((data->xfer_len == 0U) && i2c_rtio_complete(ctx, status)) {
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i2c_stm32_start(dev);
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}
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@ -277,12 +286,150 @@ static void handle_btf(const struct device *dev)
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}
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}
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#if defined(CONFIG_I2C_TARGET)
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static void i2c_stm32_target_event(const struct device *dev)
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{
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const struct i2c_stm32_config *cfg = dev->config;
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struct i2c_stm32_data *data = dev->data;
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I2C_TypeDef *i2c = cfg->i2c;
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const struct i2c_target_callbacks *target_cb =
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data->slave_cfg->callbacks;
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if (LL_I2C_IsActiveFlag_TXE(i2c) && LL_I2C_IsActiveFlag_BTF(i2c)) {
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uint8_t val;
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target_cb->read_processed(data->slave_cfg, &val);
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LL_I2C_TransmitData8(i2c, val);
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return;
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}
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if (LL_I2C_IsActiveFlag_RXNE(i2c)) {
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uint8_t val = LL_I2C_ReceiveData8(i2c);
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if (target_cb->write_received(data->slave_cfg, val)) {
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LL_I2C_AcknowledgeNextData(i2c, LL_I2C_NACK);
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}
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return;
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}
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if (LL_I2C_IsActiveFlag_AF(i2c)) {
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LL_I2C_ClearFlag_AF(i2c);
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}
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if (LL_I2C_IsActiveFlag_STOP(i2c)) {
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LL_I2C_ClearFlag_STOP(i2c);
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target_cb->stop(data->slave_cfg);
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/* Prepare to ACK next transmissions address byte */
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LL_I2C_AcknowledgeNextData(i2c, LL_I2C_ACK);
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}
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if (LL_I2C_IsActiveFlag_ADDR(i2c)) {
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uint32_t dir = LL_I2C_GetTransferDirection(i2c);
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if (dir == LL_I2C_DIRECTION_READ) {
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target_cb->write_requested(data->slave_cfg);
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LL_I2C_EnableIT_RX(i2c);
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} else {
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uint8_t val;
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target_cb->read_requested(data->slave_cfg, &val);
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LL_I2C_TransmitData8(i2c, val);
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LL_I2C_EnableIT_TX(i2c);
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}
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i2c_stm32_enable_transfer_interrupts(dev);
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}
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}
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/* Attach and start I2C as target */
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int i2c_stm32_target_register(const struct device *dev, struct i2c_target_config *config)
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{
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const struct i2c_stm32_config *cfg = dev->config;
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struct i2c_stm32_data *data = dev->data;
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I2C_TypeDef *i2c = cfg->i2c;
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uint32_t bitrate_cfg;
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int ret;
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if (config == NULL) {
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return -EINVAL;
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}
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if (data->slave_attached) {
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return -EBUSY;
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}
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if (data->master_active) {
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return -EBUSY;
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}
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bitrate_cfg = i2c_map_dt_bitrate(cfg->bitrate);
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ret = i2c_stm32_runtime_configure(dev, bitrate_cfg);
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if (ret < 0) {
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LOG_ERR("i2c: failure initializing");
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return ret;
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}
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data->slave_cfg = config;
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LL_I2C_Enable(i2c);
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if (data->slave_cfg->flags == I2C_TARGET_FLAGS_ADDR_10_BITS) {
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return -ENOTSUP;
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}
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LL_I2C_SetOwnAddress1(i2c, config->address << 1U, LL_I2C_OWNADDRESS1_7BIT);
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data->slave_attached = true;
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LOG_DBG("i2c: target registered");
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i2c_stm32_enable_transfer_interrupts(dev);
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LL_I2C_AcknowledgeNextData(i2c, LL_I2C_ACK);
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return 0;
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}
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int i2c_stm32_target_unregister(const struct device *dev, struct i2c_target_config *config)
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{
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const struct i2c_stm32_config *cfg = dev->config;
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struct i2c_stm32_data *data = dev->data;
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I2C_TypeDef *i2c = cfg->i2c;
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if (!data->slave_attached) {
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return -EINVAL;
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}
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if (data->master_active) {
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return -EBUSY;
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}
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i2c_stm32_disable_transfer_interrupts(dev);
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LL_I2C_ClearFlag_AF(i2c);
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LL_I2C_ClearFlag_STOP(i2c);
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LL_I2C_ClearFlag_ADDR(i2c);
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LL_I2C_Disable(i2c);
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data->slave_attached = false;
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LOG_DBG("i2c: target unregistered");
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return 0;
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}
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#endif /* defined(CONFIG_I2C_TARGET) */
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void i2c_stm32_event(const struct device *dev)
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{
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const struct i2c_stm32_config *cfg = dev->config;
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struct i2c_stm32_data *data = dev->data;
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I2C_TypeDef *i2c = cfg->i2c;
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#if defined(CONFIG_I2C_TARGET)
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if (data->slave_attached && !data->master_active) {
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i2c_stm32_target_event(dev);
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return;
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}
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#endif
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if (LL_I2C_IsActiveFlag_SB(i2c)) {
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handle_sb(dev);
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} else if (LL_I2C_IsActiveFlag_ADD10(i2c)) {
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@ -303,6 +450,15 @@ int i2c_stm32_error(const struct device *dev)
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const struct i2c_stm32_config *cfg = dev->config;
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I2C_TypeDef *i2c = cfg->i2c;
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#if defined(CONFIG_I2C_TARGET)
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struct i2c_stm32_data *data = dev->data;
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if (data->slave_attached && !data->master_active) {
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/* No need for a target error function right now. */
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return 0;
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}
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#endif
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if (LL_I2C_IsActiveFlag_AF(i2c)) {
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LL_I2C_ClearFlag_AF(i2c);
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LL_I2C_GenerateStopCondition(i2c);
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@ -338,6 +494,9 @@ int i2c_stm32_msg_start(const struct device *dev, uint8_t flags,
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data->msg_len = buf_len;
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data->is_restart = 0;
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data->slave_address = i2c_addr;
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#if defined(CONFIG_I2C_TARGET)
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data->master_active = true;
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#endif
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LL_I2C_Enable(i2c);
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@ -61,8 +61,260 @@ static void i2c_stm32_master_mode_end(const struct device *dev)
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if (LL_I2C_IsEnabledReloadMode(i2c)) {
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LL_I2C_DisableReloadMode(i2c);
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}
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#if defined(CONFIG_I2C_TARGET)
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struct i2c_stm32_data *data = dev->data;
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data->master_active = false;
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if (!data->slave_attached) {
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LL_I2C_Disable(i2c);
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}
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#else
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LL_I2C_Disable(i2c);
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#endif
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}
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#if defined(CONFIG_I2C_TARGET)
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static void i2c_stm32_target_event(const struct device *dev)
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{
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const struct i2c_stm32_config *cfg = dev->config;
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struct i2c_stm32_data *data = dev->data;
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I2C_TypeDef *i2c = cfg->i2c;
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const struct i2c_target_callbacks *target_cb;
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struct i2c_target_config *target_cfg;
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if (data->slave_cfg->flags != I2C_TARGET_FLAGS_ADDR_10_BITS) {
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uint8_t target_address;
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/* Choose the right target from the address match code */
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target_address = LL_I2C_GetAddressMatchCode(i2c) >> 1;
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if (data->slave_cfg != NULL &&
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target_address == data->slave_cfg->address) {
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target_cfg = data->slave_cfg;
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} else if (data->slave2_cfg != NULL &&
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target_address == data->slave2_cfg->address) {
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target_cfg = data->slave2_cfg;
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} else {
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__ASSERT_NO_MSG(0);
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return;
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}
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} else {
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/* On STM32 the LL_I2C_GetAddressMatchCode & (ISR register) returns
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* only 7bits of address match so 10 bit dual addressing is broken.
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* Revert to assuming single address match.
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*/
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if (data->slave_cfg != NULL) {
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target_cfg = data->slave_cfg;
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} else {
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__ASSERT_NO_MSG(0);
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return;
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}
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}
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target_cb = target_cfg->callbacks;
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if (LL_I2C_IsActiveFlag_TXIS(i2c)) {
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uint8_t val;
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if (target_cb->read_processed(target_cfg, &val) < 0) {
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LOG_ERR("Error continuing reading");
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} else {
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LL_I2C_TransmitData8(i2c, val);
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}
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return;
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}
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if (LL_I2C_IsActiveFlag_RXNE(i2c)) {
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uint8_t val = LL_I2C_ReceiveData8(i2c);
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if (target_cb->write_received(target_cfg, val)) {
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LL_I2C_AcknowledgeNextData(i2c, LL_I2C_NACK);
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}
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return;
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}
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if (LL_I2C_IsActiveFlag_NACK(i2c)) {
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LL_I2C_ClearFlag_NACK(i2c);
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}
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if (LL_I2C_IsActiveFlag_STOP(i2c)) {
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i2c_stm32_disable_transfer_interrupts(dev);
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/* Flush remaining TX byte before clearing Stop Flag */
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LL_I2C_ClearFlag_TXE(i2c);
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LL_I2C_ClearFlag_STOP(i2c);
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target_cb->stop(target_cfg);
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/* Prepare to ACK next transmissions address byte */
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LL_I2C_AcknowledgeNextData(i2c, LL_I2C_ACK);
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}
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if (LL_I2C_IsActiveFlag_ADDR(i2c)) {
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uint32_t dir;
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LL_I2C_ClearFlag_ADDR(i2c);
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dir = LL_I2C_GetTransferDirection(i2c);
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if (dir == LL_I2C_DIRECTION_WRITE) {
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if (target_cb->write_requested(target_cfg) < 0) {
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LOG_ERR("Error initiating writing");
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} else {
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LL_I2C_EnableIT_RX(i2c);
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}
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} else {
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uint8_t val;
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if (target_cb->read_requested(target_cfg, &val) < 0) {
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LOG_ERR("Error initiating reading");
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} else {
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LL_I2C_TransmitData8(i2c, val);
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LL_I2C_EnableIT_TX(i2c);
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}
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}
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i2c_stm32_enable_transfer_interrupts(dev);
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}
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}
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/* Attach and start I2C as target */
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int i2c_stm32_target_register(const struct device *dev,
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struct i2c_target_config *config)
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{
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const struct i2c_stm32_config *cfg = dev->config;
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struct i2c_stm32_data *data = dev->data;
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I2C_TypeDef *i2c = cfg->i2c;
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uint32_t bitrate_cfg;
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int ret;
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if (config == NULL) {
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return -EINVAL;
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}
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if (data->slave_cfg && data->slave2_cfg) {
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return -EBUSY;
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}
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if (data->master_active) {
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return -EBUSY;
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}
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bitrate_cfg = i2c_map_dt_bitrate(cfg->bitrate);
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ret = i2c_stm32_runtime_configure(dev, bitrate_cfg);
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if (ret < 0) {
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LOG_ERR("i2c: failure initializing");
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return ret;
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}
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|
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#if defined(CONFIG_PM_DEVICE_RUNTIME)
|
||||
if (pm_device_wakeup_is_capable(dev)) {
|
||||
/* Mark device as active */
|
||||
(void)pm_device_runtime_get(dev);
|
||||
/* Enable wake-up from stop */
|
||||
LOG_DBG("i2c: enabling wakeup from stop");
|
||||
LL_I2C_EnableWakeUpFromStop(cfg->i2c);
|
||||
}
|
||||
#endif /* defined(CONFIG_PM_DEVICE_RUNTIME) */
|
||||
|
||||
LL_I2C_Enable(i2c);
|
||||
|
||||
if (!data->slave_cfg) {
|
||||
data->slave_cfg = config;
|
||||
if (data->slave_cfg->flags == I2C_TARGET_FLAGS_ADDR_10_BITS) {
|
||||
LL_I2C_SetOwnAddress1(i2c, config->address, LL_I2C_OWNADDRESS1_10BIT);
|
||||
LOG_DBG("i2c: target #1 registered with 10-bit address");
|
||||
} else {
|
||||
LL_I2C_SetOwnAddress1(i2c, config->address << 1U, LL_I2C_OWNADDRESS1_7BIT);
|
||||
LOG_DBG("i2c: target #1 registered with 7-bit address");
|
||||
}
|
||||
|
||||
LL_I2C_EnableOwnAddress1(i2c);
|
||||
|
||||
LOG_DBG("i2c: target #1 registered");
|
||||
} else {
|
||||
data->slave2_cfg = config;
|
||||
|
||||
if (data->slave2_cfg->flags == I2C_TARGET_FLAGS_ADDR_10_BITS) {
|
||||
return -EINVAL;
|
||||
}
|
||||
LL_I2C_SetOwnAddress2(i2c, config->address << 1U,
|
||||
LL_I2C_OWNADDRESS2_NOMASK);
|
||||
LL_I2C_EnableOwnAddress2(i2c);
|
||||
LOG_DBG("i2c: target #2 registered");
|
||||
}
|
||||
|
||||
data->slave_attached = true;
|
||||
|
||||
LL_I2C_EnableIT_ADDR(i2c);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int i2c_stm32_target_unregister(const struct device *dev,
|
||||
struct i2c_target_config *config)
|
||||
{
|
||||
const struct i2c_stm32_config *cfg = dev->config;
|
||||
struct i2c_stm32_data *data = dev->data;
|
||||
I2C_TypeDef *i2c = cfg->i2c;
|
||||
|
||||
if (!data->slave_attached) {
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
if (data->master_active) {
|
||||
return -EBUSY;
|
||||
}
|
||||
|
||||
if (config == data->slave_cfg) {
|
||||
LL_I2C_DisableOwnAddress1(i2c);
|
||||
data->slave_cfg = NULL;
|
||||
|
||||
LOG_DBG("i2c: target #1 unregistered");
|
||||
} else if (config == data->slave2_cfg) {
|
||||
LL_I2C_DisableOwnAddress2(i2c);
|
||||
data->slave2_cfg = NULL;
|
||||
|
||||
LOG_DBG("i2c: target #2 unregistered");
|
||||
} else {
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
/* Return if there is a target remaining */
|
||||
if (data->slave_cfg || data->slave2_cfg) {
|
||||
LOG_DBG("i2c: target#%c still registered", data->slave_cfg?'1':'2');
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* Otherwise disable I2C */
|
||||
LL_I2C_DisableIT_ADDR(i2c);
|
||||
i2c_stm32_disable_transfer_interrupts(dev);
|
||||
|
||||
LL_I2C_ClearFlag_NACK(i2c);
|
||||
LL_I2C_ClearFlag_STOP(i2c);
|
||||
LL_I2C_ClearFlag_ADDR(i2c);
|
||||
|
||||
LL_I2C_Disable(i2c);
|
||||
|
||||
#if defined(CONFIG_PM_DEVICE_RUNTIME)
|
||||
if (pm_device_wakeup_is_capable(dev)) {
|
||||
/* Disable wake-up from STOP */
|
||||
LOG_DBG("i2c: disabling wakeup from stop");
|
||||
LL_I2C_DisableWakeUpFromStop(i2c);
|
||||
/* Release the device */
|
||||
(void)pm_device_runtime_put(dev);
|
||||
}
|
||||
#endif /* defined(CONFIG_PM_DEVICE_RUNTIME) */
|
||||
|
||||
data->slave_attached = false;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
#endif /* defined(CONFIG_I2C_TARGET) */
|
||||
|
||||
static void i2c_stm32_reload_burst(const struct device *dev)
|
||||
{
|
||||
const struct i2c_stm32_config *cfg = dev->config;
|
||||
@ -98,6 +350,13 @@ void i2c_stm32_event(const struct device *dev)
|
||||
I2C_TypeDef *i2c = cfg->i2c;
|
||||
int ret = 0;
|
||||
|
||||
#if defined(CONFIG_I2C_TARGET)
|
||||
if (data->slave_attached && !data->master_active) {
|
||||
i2c_stm32_target_event(dev);
|
||||
return;
|
||||
}
|
||||
#endif
|
||||
|
||||
if (data->burst_len != 0U) {
|
||||
/* Send next byte */
|
||||
if (LL_I2C_IsActiveFlag_TXIS(i2c)) {
|
||||
@ -166,6 +425,13 @@ int i2c_stm32_error(const struct device *dev)
|
||||
I2C_TypeDef *i2c = cfg->i2c;
|
||||
int ret = 0;
|
||||
|
||||
#if defined(CONFIG_I2C_TARGET)
|
||||
if (data->slave_attached && !data->master_active) {
|
||||
/* No need for a target error function right now. */
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
if (LL_I2C_IsActiveFlag_ARLO(i2c)) {
|
||||
LL_I2C_ClearFlag_ARLO(i2c);
|
||||
ret = -EIO;
|
||||
@ -233,6 +499,10 @@ int i2c_stm32_msg_start(const struct device *dev, uint8_t flags,
|
||||
LL_I2C_SetTransferRequest(i2c, transfer);
|
||||
LL_I2C_SetTransferSize(i2c, data->burst_len);
|
||||
|
||||
#if defined(CONFIG_I2C_TARGET)
|
||||
data->master_active = true;
|
||||
#endif
|
||||
|
||||
LL_I2C_Enable(i2c);
|
||||
|
||||
LL_I2C_GenerateStartCondition(i2c);
|
||||
|
||||
Loading…
Reference in New Issue
Block a user