From 7869e05649f23cfb4e94a5430826282f8a61498b Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Fin=20Maa=C3=9F?= Date: Thu, 1 Aug 2024 10:14:09 +0200 Subject: [PATCH] dts: bindings: litex: rename uart compatible MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Zero got removed from the litex uart compatible, as it now supports multiple instances. Signed-off-by: Fin Maaß --- drivers/serial/Kconfig.litex | 2 +- drivers/serial/uart_litex.c | 2 +- dts/bindings/serial/{litex,uart0.yaml => litex,uart.yaml} | 2 +- dts/riscv/riscv32-litex-vexriscv.dtsi | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-) rename dts/bindings/serial/{litex,uart0.yaml => litex,uart.yaml} (89%) diff --git a/drivers/serial/Kconfig.litex b/drivers/serial/Kconfig.litex index 9e032971a2a..70d7ccc7cb4 100644 --- a/drivers/serial/Kconfig.litex +++ b/drivers/serial/Kconfig.litex @@ -6,7 +6,7 @@ config UART_LITEX bool "LiteX serial driver" default y - depends on DT_HAS_LITEX_UART0_ENABLED + depends on DT_HAS_LITEX_UART_ENABLED select SERIAL_HAS_DRIVER select SERIAL_SUPPORT_INTERRUPT help diff --git a/drivers/serial/uart_litex.c b/drivers/serial/uart_litex.c index c391f51021f..99cbcbe6594 100644 --- a/drivers/serial/uart_litex.c +++ b/drivers/serial/uart_litex.c @@ -4,7 +4,7 @@ * SPDX-License-Identifier: Apache-2.0 */ -#define DT_DRV_COMPAT litex_uart0 +#define DT_DRV_COMPAT litex_uart #include #include diff --git a/dts/bindings/serial/litex,uart0.yaml b/dts/bindings/serial/litex,uart.yaml similarity index 89% rename from dts/bindings/serial/litex,uart0.yaml rename to dts/bindings/serial/litex,uart.yaml index 1c60e75c89f..bf388e0cdc6 100644 --- a/dts/bindings/serial/litex,uart0.yaml +++ b/dts/bindings/serial/litex,uart.yaml @@ -3,7 +3,7 @@ description: LiteX UART -compatible: "litex,uart0" +compatible: "litex,uart" include: uart-controller.yaml diff --git a/dts/riscv/riscv32-litex-vexriscv.dtsi b/dts/riscv/riscv32-litex-vexriscv.dtsi index 6d7cb7bd2fb..78d850b58e6 100644 --- a/dts/riscv/riscv32-litex-vexriscv.dtsi +++ b/dts/riscv/riscv32-litex-vexriscv.dtsi @@ -53,7 +53,7 @@ riscv,max-priority = <7>; }; uart0: serial@e0001800 { - compatible = "litex,uart0"; + compatible = "litex,uart"; interrupt-parent = <&intc0>; interrupts = <2 10>; reg = <0xe0001800 0x4