From 71ba2de75c080ce5ed65a12c4c0b928f0f2ce712 Mon Sep 17 00:00:00 2001 From: Armando Visconti Date: Thu, 5 Jul 2018 17:25:44 +0200 Subject: [PATCH] ext: stm32cube: stm32f4xx: shift I2SR field in PLLI2SCFGR register The I2SR field should be shifted by RCC_PLLI2SCFGR_PLLI2SR_Pos when the PLLI2SCFGR register is read or written. Without this patch the PLLI2S configuration is not done properly (R and M params are badly set) and the PLLI2S generates bad clock waveform. ST Bug tracker ID: 50086 Signed-off-by: Armando Visconti --- ext/hal/st/stm32cube/stm32f4xx/README | 7 +++++++ .../stm32cube/stm32f4xx/drivers/include/stm32f4xx_ll_rcc.h | 4 ++-- 2 files changed, 9 insertions(+), 2 deletions(-) diff --git a/ext/hal/st/stm32cube/stm32f4xx/README b/ext/hal/st/stm32cube/stm32f4xx/README index 5512ec453d0..95b663555c1 100644 --- a/ext/hal/st/stm32cube/stm32f4xx/README +++ b/ext/hal/st/stm32cube/stm32f4xx/README @@ -43,3 +43,10 @@ Patch List: Impacted files: drivers/include/stm32f4xx_hal_conf.h ST Bug tracker ID: NA. Not a stm32cube issue + + *Add correct shifting to I2SR field in PLLI2SCFGR register + The I2SR field should be shifted by RCC_PLLI2SCFGR_PLLI2SR_Pos when the PLLI2SCFGR register + is read or written. + Impacted files: + drivers/include/stm32f4xx_ll_rcc.h + ST Bug tracker ID: 50086 diff --git a/ext/hal/st/stm32cube/stm32f4xx/drivers/include/stm32f4xx_ll_rcc.h b/ext/hal/st/stm32cube/stm32f4xx/drivers/include/stm32f4xx_ll_rcc.h index 253f0d3c7ed..4183639d63e 100644 --- a/ext/hal/st/stm32cube/stm32f4xx/drivers/include/stm32f4xx_ll_rcc.h +++ b/ext/hal/st/stm32cube/stm32f4xx/drivers/include/stm32f4xx_ll_rcc.h @@ -5685,7 +5685,7 @@ __STATIC_INLINE void LL_RCC_PLLI2S_ConfigDomain_I2S(uint32_t Source, uint32_t PL #else MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLM, PLLM); #endif /* RCC_PLLI2SCFGR_PLLI2SM */ - MODIFY_REG(RCC->PLLI2SCFGR, RCC_PLLI2SCFGR_PLLI2SN | RCC_PLLI2SCFGR_PLLI2SR, PLLN << RCC_PLLI2SCFGR_PLLI2SN_Pos | PLLR); + MODIFY_REG(RCC->PLLI2SCFGR, RCC_PLLI2SCFGR_PLLI2SN | RCC_PLLI2SCFGR_PLLI2SR, PLLN << RCC_PLLI2SCFGR_PLLI2SN_Pos | PLLR << RCC_PLLI2SCFGR_PLLI2SR_Pos); } /** @@ -5740,7 +5740,7 @@ __STATIC_INLINE uint32_t LL_RCC_PLLI2S_GetQ(void) */ __STATIC_INLINE uint32_t LL_RCC_PLLI2S_GetR(void) { - return (uint32_t)(READ_BIT(RCC->PLLI2SCFGR, RCC_PLLI2SCFGR_PLLI2SR)); + return (uint32_t)(READ_BIT(RCC->PLLI2SCFGR, RCC_PLLI2SCFGR_PLLI2SR) >> RCC_PLLI2SCFGR_PLLI2SR_Pos); } #if defined(RCC_PLLI2SCFGR_PLLI2SP)