From 704a0a398a31ecb3bd4c41d1696580dccfec7cae Mon Sep 17 00:00:00 2001
From: Erwan Gouriou <erwan.gouriou@linaro.org>
Date: Wed, 5 May 2021 12:10:14 +0200
Subject: [PATCH] boards: nucleo_wb55rg: Fix left over in dts clock
 configuration

Along with other clocks settings, enable LSE clock using device tree.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
---
 boards/arm/nucleo_wb55rg/Kconfig.defconfig | 3 ---
 boards/arm/nucleo_wb55rg/nucleo_wb55rg.dts | 4 ++++
 2 files changed, 4 insertions(+), 3 deletions(-)

diff --git a/boards/arm/nucleo_wb55rg/Kconfig.defconfig b/boards/arm/nucleo_wb55rg/Kconfig.defconfig
index ae12a3ecea5..0022fd64be3 100644
--- a/boards/arm/nucleo_wb55rg/Kconfig.defconfig
+++ b/boards/arm/nucleo_wb55rg/Kconfig.defconfig
@@ -8,9 +8,6 @@ if BOARD_NUCLEO_WB55RG
 config BOARD
 	default "nucleo_wb55rg"
 
-config CLOCK_STM32_LSE
-	default y
-
 choice STM32_LPTIM_CLOCK
 	default STM32_LPTIM_CLOCK_LSE
 	depends on STM32_LPTIM_TIMER
diff --git a/boards/arm/nucleo_wb55rg/nucleo_wb55rg.dts b/boards/arm/nucleo_wb55rg/nucleo_wb55rg.dts
index 06ce7650a28..925224b0c41 100644
--- a/boards/arm/nucleo_wb55rg/nucleo_wb55rg.dts
+++ b/boards/arm/nucleo_wb55rg/nucleo_wb55rg.dts
@@ -88,6 +88,10 @@
 	status = "okay";
 };
 
+&clk_lse{
+	status = "okay";
+};
+
 &rcc {
 	clocks = <&clk_hse>;
 	clock-frequency = <DT_FREQ_M(32)>;