From 6dae38cb98b38ea2ae5ea06996065477f0fcbb86 Mon Sep 17 00:00:00 2001 From: Tomasz Jurtsch Date: Wed, 4 Apr 2018 22:11:07 +0200 Subject: [PATCH] arch: riscv32: fe310: Always-On domain adress definition Added always-on domain address definition Signed-off-by: Tomasz Michalak Signed-off-by: Karol Gugala Signed-off-by: Tomasz Jurtsch --- arch/riscv32/soc/riscv-privilege/fe310/soc.h | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/riscv32/soc/riscv-privilege/fe310/soc.h b/arch/riscv32/soc/riscv-privilege/fe310/soc.h index 9409a04845e..59c14676289 100644 --- a/arch/riscv32/soc/riscv-privilege/fe310/soc.h +++ b/arch/riscv32/soc/riscv-privilege/fe310/soc.h @@ -105,10 +105,22 @@ #define FE310_PLIC_MAX_PRIORITY 7 +/* Clock controller. */ +#define PRCI_BASE_ADDR 0x10008000 + /* Timer configuration */ #define RISCV_MTIME_BASE 0x0200BFF8 #define RISCV_MTIMECMP_BASE 0x02004000 +/* Always ON Domain */ +#define FE310_PMUIE 0x10000140 +#define FE310_PMUCAUSE 0x10000144 +#define FE310_PMUSLEEP 0x10000148 +#define FE310_PMUKEY 0x1000014C +#define FE310_SLEEP_KEY_VAL 0x0051F15E + +#define FE310_BACKUP_REG_BASE 0x10000080 + /* lib-c hooks required RAM defined variables */ #define RISCV_RAM_BASE CONFIG_RISCV_RAM_BASE_ADDR #define RISCV_RAM_SIZE CONFIG_RISCV_RAM_SIZE