diff --git a/samples/drivers/mbox/boards/adp_xc7k_ae350.conf b/samples/drivers/mbox/boards/adp_xc7k_ae350.conf index bdeaed5e885..a0e60ddb911 100644 --- a/samples/drivers/mbox/boards/adp_xc7k_ae350.conf +++ b/samples/drivers/mbox/boards/adp_xc7k_ae350.conf @@ -1 +1,2 @@ CONFIG_RV_BOOT_HART=0 +CONFIG_MP_MAX_NUM_CPUS=1 diff --git a/samples/drivers/mbox/boards/adp_xc7k_ae350.overlay b/samples/drivers/mbox/boards/adp_xc7k_ae350.overlay index b79fd18246d..a68f0f4f2ff 100644 --- a/samples/drivers/mbox/boards/adp_xc7k_ae350.overlay +++ b/samples/drivers/mbox/boards/adp_xc7k_ae350.overlay @@ -1,25 +1,16 @@ /* - * Copyright (c) 2019 Linaro Limited - * + * Copyright (c) 2022 Andes Technology Corporation. * SPDX-License-Identifier: Apache-2.0 */ / { - chosen { - /* - * shared memory reserved for the inter-processor communication - */ - zephyr,sram = &sram; - }; - - sram: memory@0 { - compatible = "mmio-sram"; - reg = <0x00000000 0x10000000 >; - }; - mbox-consumer { compatible = "vnd,mbox-consumer"; - mboxes = <&mbox 1>, <&mbox 0>; + mboxes = <&mbox 9>, <&mbox 10>; mbox-names = "tx", "rx"; }; }; + +&dram { + reg = <0x00000000 0x10000000>; +}; diff --git a/samples/drivers/mbox/remote/boards/adp_xc7k_ae350.conf b/samples/drivers/mbox/remote/boards/adp_xc7k_ae350.conf new file mode 100644 index 00000000000..7a16a4210bf --- /dev/null +++ b/samples/drivers/mbox/remote/boards/adp_xc7k_ae350.conf @@ -0,0 +1,2 @@ +CONFIG_RV_BOOT_HART=1 +CONFIG_MP_MAX_NUM_CPUS=1 diff --git a/samples/drivers/mbox/remote/boards/adp_xc7k_ae350.overlay b/samples/drivers/mbox/remote/boards/adp_xc7k_ae350.overlay index 736ea3f3f6d..7976e62b0be 100644 --- a/samples/drivers/mbox/remote/boards/adp_xc7k_ae350.overlay +++ b/samples/drivers/mbox/remote/boards/adp_xc7k_ae350.overlay @@ -1,13 +1,20 @@ /* - * Copyright (c) 2019 Linaro Limited - * + * Copyright (c) 2022 Andes Technology Corporation. * SPDX-License-Identifier: Apache-2.0 */ / { mbox-consumer { compatible = "vnd,mbox-consumer"; - mboxes = <&mbox 0>, <&mbox 1>; + mboxes = <&mbox 10>, <&mbox 9>; mbox-names = "tx", "rx"; }; }; + +&cpu0 { + status = "disabled"; +}; + +&dram { + reg = <0x10000000 0x10000000>; +};