From 6503795dc1a3a61ba2c91270fba2bd2f6a2a0a4d Mon Sep 17 00:00:00 2001
From: Carlo Caione <ccaione@baylibre.com>
Date: Mon, 13 Jun 2022 23:20:58 +0200
Subject: [PATCH] riscv: Introduce BitManip extensions

Add Zba, Zbb, Zbc and Zbs BitManip extensions.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
---
 arch/riscv/Kconfig.isa                | 36 +++++++++++++++++++++++++++
 cmake/compiler/gcc/target_riscv.cmake | 16 ++++++++++++
 2 files changed, 52 insertions(+)

diff --git a/arch/riscv/Kconfig.isa b/arch/riscv/Kconfig.isa
index ce6b07ea467..70599843c48 100644
--- a/arch/riscv/Kconfig.isa
+++ b/arch/riscv/Kconfig.isa
@@ -110,3 +110,39 @@ config RISCV_ISA_EXT_ZIFENCEI
 	  The "Zifencei" extension includes the FENCE.I instruction that
 	  provides explicit synchronization between writes to instruction
 	  memory and instruction fetches on the same hart.
+
+config RISCV_ISA_EXT_ZBA
+	bool
+	help
+	  (Zba) - Zba BitManip Extension
+
+	  The Zba instructions can be used to accelerate the generation of
+	  addresses that index into arrays of basic types (halfword, word,
+	  doubleword) using both unsigned word-sized and XLEN-sized indices: a
+	  shifted index is added to a base address.
+
+config RISCV_ISA_EXT_ZBB
+	bool
+	help
+	  (Zbb) - Zbb BitManip Extension (Basic bit-manipulation)
+
+	  The Zbb instructions can be used for basic bit-manipulation (logical
+	  with negate, count leading / trailing zero bits, count population,
+	  etc...).
+
+config RISCV_ISA_EXT_ZBC
+	bool
+	help
+	  (Zbc) - Zbc BitManip Extension (Carry-less multiplication)
+
+	  The Zbc instructions can be used for carry-less multiplication that
+	  is the multiplication in the polynomial ring over GF(2).
+
+config RISCV_ISA_EXT_ZBS
+	bool
+	help
+	  (Zbs) - Zbs BitManip Extension (Single-bit instructions)
+
+	  The Zbs instructions can be used for single-bit instructions that
+	  provide a mechanism to set, clear, invert, or extract a single bit in
+	  a register.
diff --git a/cmake/compiler/gcc/target_riscv.cmake b/cmake/compiler/gcc/target_riscv.cmake
index 5d5f5cdecfc..b4875720c9b 100644
--- a/cmake/compiler/gcc/target_riscv.cmake
+++ b/cmake/compiler/gcc/target_riscv.cmake
@@ -53,5 +53,21 @@ if(CONFIG_RISCV_ISA_EXT_ZIFENCEI)
     string(CONCAT riscv_march ${riscv_march} "_zifencei")
 endif()
 
+if(CONFIG_RISCV_ISA_EXT_ZBA)
+    string(CONCAT riscv_march ${riscv_march} "_zba")
+endif()
+
+if(CONFIG_RISCV_ISA_EXT_ZBB)
+    string(CONCAT riscv_march ${riscv_march} "_zbb")
+endif()
+
+if(CONFIG_RISCV_ISA_EXT_ZBC)
+    string(CONCAT riscv_march ${riscv_march} "_zbc")
+endif()
+
+if(CONFIG_RISCV_ISA_EXT_ZBS)
+    string(CONCAT riscv_march ${riscv_march} "_zbs")
+endif()
+
 list(APPEND TOOLCHAIN_C_FLAGS -mabi=${riscv_mabi} -march=${riscv_march})
 list(APPEND TOOLCHAIN_LD_FLAGS NO_SPLIT -mabi=${riscv_mabi} -march=${riscv_march})