shell: backends: uart: Rework and add support for async API
Rework UART backend to clearly use single instance approach as before it was a bit messy with some parts of implementation indicating multi-instance approach and some single instance. Backend has been around for years and multi-instance requirement never came. Added support for UART asynchronous API which is more efficient in terms of power consumption and performance. Asynchronous API support is using uart_async_rx helper module for handling data received asynchronously. Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
This commit is contained in:
Krzysztof Chruściński
Carles Cufí
parent
8ba4249ef7
commit
5e4e944cc0
@ -8,81 +8,15 @@
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#define SHELL_UART_H__
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#include <zephyr/shell/shell.h>
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#include <zephyr/sys/ring_buffer.h>
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#include <zephyr/sys/atomic.h>
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#include <zephyr/mgmt/mcumgr/transport/smp_shell.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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extern const struct shell_transport_api shell_uart_transport_api;
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/** @brief Shell UART transport instance control block (RW data). */
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struct shell_uart_ctrl_blk {
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const struct device *dev;
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shell_transport_handler_t handler;
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void *context;
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atomic_t tx_busy;
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bool blocking_tx;
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#ifdef CONFIG_MCUMGR_TRANSPORT_SHELL
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struct smp_shell_data smp;
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#endif /* CONFIG_MCUMGR_TRANSPORT_SHELL */
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};
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#ifdef CONFIG_SHELL_BACKEND_SERIAL_INTERRUPT_DRIVEN
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#define Z_UART_SHELL_TX_RINGBUF_DECLARE(_name, _size) \
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RING_BUF_DECLARE(_name##_tx_ringbuf, _size)
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#define Z_UART_SHELL_RX_TIMER_DECLARE(_name) /* Empty */
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#define Z_UART_SHELL_TX_RINGBUF_PTR(_name) (&_name##_tx_ringbuf)
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#define Z_UART_SHELL_RX_TIMER_PTR(_name) NULL
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#define Z_UART_SHELL_DTR_TIMER_DECLARE(_name) static struct k_timer _name##_dtr_timer
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#define Z_UART_SHELL_DTR_TIMER_PTR(_name) (&_name##_dtr_timer)
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#else /* CONFIG_SHELL_BACKEND_SERIAL_INTERRUPT_DRIVEN */
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#define Z_UART_SHELL_TX_RINGBUF_DECLARE(_name, _size) /* Empty */
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#define Z_UART_SHELL_RX_TIMER_DECLARE(_name) static struct k_timer _name##_timer
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#define Z_UART_SHELL_TX_RINGBUF_PTR(_name) NULL
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#define Z_UART_SHELL_RX_TIMER_PTR(_name) (&_name##_timer)
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#define Z_UART_SHELL_DTR_TIMER_DECLARE(_name) /* Empty */
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#define Z_UART_SHELL_DTR_TIMER_PTR(_name) NULL
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#endif /* CONFIG_SHELL_BACKEND_SERIAL_INTERRUPT_DRIVEN */
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/** @brief Shell UART transport instance structure. */
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struct shell_uart {
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struct shell_uart_ctrl_blk *ctrl_blk;
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struct k_timer *timer;
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struct k_timer *dtr_timer;
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struct ring_buf *tx_ringbuf;
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struct ring_buf *rx_ringbuf;
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};
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/** @brief Macro for creating shell UART transport instance. */
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#define SHELL_UART_DEFINE(_name, _tx_ringbuf_size, _rx_ringbuf_size) \
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static struct shell_uart_ctrl_blk _name##_ctrl_blk; \
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Z_UART_SHELL_RX_TIMER_DECLARE(_name); \
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Z_UART_SHELL_DTR_TIMER_DECLARE(_name); \
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Z_UART_SHELL_TX_RINGBUF_DECLARE(_name, _tx_ringbuf_size); \
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RING_BUF_DECLARE(_name##_rx_ringbuf, _rx_ringbuf_size); \
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static const struct shell_uart _name##_shell_uart = { \
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.ctrl_blk = &_name##_ctrl_blk, \
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.timer = Z_UART_SHELL_RX_TIMER_PTR(_name), \
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.dtr_timer = Z_UART_SHELL_DTR_TIMER_PTR(_name), \
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.tx_ringbuf = Z_UART_SHELL_TX_RINGBUF_PTR(_name), \
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.rx_ringbuf = &_name##_rx_ringbuf, \
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}; \
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struct shell_transport _name = { \
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.api = &shell_uart_transport_api, \
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.ctx = (struct shell_uart *)&_name##_shell_uart \
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}
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/**
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* @brief This function provides pointer to shell uart backend instance.
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* @brief This function provides pointer to the shell UART backend instance.
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*
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* Function returns pointer to the shell uart instance. This instance can be
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* Function returns pointer to the shell UART instance. This instance can be
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* next used with shell_execute_cmd function in order to test commands behavior.
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*
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* @returns Pointer to the shell instance.
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@ -42,23 +42,44 @@ config SHELL_PROMPT_UART
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Displayed prompt name for UART backend. If prompt is set, the shell will
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send two newlines during initialization.
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# Internal config to enable UART interrupts if supported.
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config SHELL_BACKEND_SERIAL_INTERRUPT_DRIVEN
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bool "Interrupt driven"
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default y
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depends on SERIAL_SUPPORT_INTERRUPT
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choice SHELL_BACKEND_SERIAL_API
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prompt "Mode"
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default SHELL_BACKEND_SERIAL_API_ASYNC if SERIAL_SUPPORT_ASYNC
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default SHELL_BACKEND_SERIAL_API_INTERRUPT_DRIVEN if SERIAL_SUPPORT_INTERRUPT
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default SHELL_BACKEND_SERIAL_API_POLLING
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config SHELL_BACKEND_SERIAL_API_POLLING
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prompt "Polling"
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config SHELL_BACKEND_SERIAL_API_INTERRUPT_DRIVEN
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bool "Interrupt driven"
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depends on SERIAL_SUPPORT_INTERRUPT
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select UART_INTERRUPT_DRIVEN
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config SHELL_BACKEND_SERIAL_API_ASYNC
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bool "Asynchronous"
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depends on SERIAL_SUPPORT_ASYNC
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select UART_ASYNC_RX_HELPER
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select UART_ASYNC_API
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endchoice
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config SHELL_BACKEND_SERIAL_TX_RING_BUFFER_SIZE
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int "Set TX ring buffer size"
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default 8
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depends on SHELL_BACKEND_SERIAL_INTERRUPT_DRIVEN
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depends on SHELL_BACKEND_SERIAL_API_INTERRUPT_DRIVEN
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help
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If UART is utilizing DMA transfers then increasing ring buffer size
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increases transfers length and reduces number of interrupts.
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config SHELL_BACKEND_SERIAL_RX_RING_BUFFER_SIZE
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int "Set RX ring buffer size"
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depends on SHELL_BACKEND_SERIAL_API_INTERRUPT_DRIVEN || SHELL_BACKEND_SERIAL_API_POLLING
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default 256 if MCUMGR_TRANSPORT_SHELL
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default 64
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help
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@ -68,16 +89,45 @@ config SHELL_BACKEND_SERIAL_RX_RING_BUFFER_SIZE
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escape sequences). However, if bulk data is transferred it may be
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required to increase it.
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if SHELL_BACKEND_SERIAL_API_ASYNC
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config SHELL_BACKEND_SERIAL_ASYNC_RX_TIMEOUT
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int "RX inactivity timeout (in microseconds)"
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default 10000
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help
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Inactivity timeout after which received data is reported.
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config SHELL_BACKEND_SERIAL_ASYNC_RX_BUFFER_COUNT
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int "Number of RX buffers"
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default 4
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range 2 64
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help
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Number of RX buffers. Some UART driver implementations changes buffers
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on timeout so this number should be big enough to cover handling on
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time incoming data. 4 should be enough for almost all the cases unless
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CPU load is high and there is very high shell thread latency.
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config SHELL_BACKEND_SERIAL_ASYNC_RX_BUFFER_SIZE
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int "Size of the RX buffer"
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default 16
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help
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Size of a single RX buffer. Together with buffer count it defines the
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space that can hold RX data. It may be decreased if shell input is
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slow and may need to be increased if long messages are pasted directly
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to the shell prompt.
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endif # SHELL_BACKEND_SERIAL_API_ASYNC
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config SHELL_BACKEND_SERIAL_RX_POLL_PERIOD
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int "RX polling period (in milliseconds)"
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default 10
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depends on !SHELL_BACKEND_SERIAL_INTERRUPT_DRIVEN
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depends on SHELL_BACKEND_SERIAL_API_POLLING
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help
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Determines how often UART is polled for RX byte.
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config SHELL_BACKEND_SERIAL_CHECK_DTR
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bool "Check DTR signal before TX"
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depends on SHELL_BACKEND_SERIAL_INTERRUPT_DRIVEN
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depends on SHELL_BACKEND_SERIAL_API_INTERRUPT_DRIVEN
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depends on UART_LINE_CTRL
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help
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Check DTR signal before TX.
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@ -4,8 +4,12 @@
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <zephyr/sys/ring_buffer.h>
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#include <zephyr/sys/atomic.h>
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#include <zephyr/mgmt/mcumgr/transport/smp_shell.h>
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#include <zephyr/shell/shell_uart.h>
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#include <zephyr/drivers/uart.h>
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#include <zephyr/drivers/serial/uart_async_rx.h>
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#include <zephyr/init.h>
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#include <zephyr/logging/log.h>
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#include <zephyr/net/buf.h>
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@ -19,34 +23,122 @@ LOG_MODULE_REGISTER(shell_uart);
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#define RX_POLL_PERIOD K_NO_WAIT
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#endif
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#ifndef CONFIG_SHELL_BACKEND_SERIAL_RX_RING_BUFFER_SIZE
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#define CONFIG_SHELL_BACKEND_SERIAL_RX_RING_BUFFER_SIZE 0
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#endif
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#ifndef CONFIG_SHELL_BACKEND_SERIAL_TX_RING_BUFFER_SIZE
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#define CONFIG_SHELL_BACKEND_SERIAL_TX_RING_BUFFER_SIZE 0
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#endif
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#ifndef CONFIG_SHELL_BACKEND_SERIAL_ASYNC_RX_BUFFER_COUNT
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#define CONFIG_SHELL_BACKEND_SERIAL_ASYNC_RX_BUFFER_COUNT 0
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#endif
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#ifndef CONFIG_SHELL_BACKEND_SERIAL_ASYNC_RX_BUFFER_SIZE
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#define CONFIG_SHELL_BACKEND_SERIAL_ASYNC_RX_BUFFER_SIZE 0
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#endif
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#define ASYNC_RX_BUF_SIZE (CONFIG_SHELL_BACKEND_SERIAL_ASYNC_RX_BUFFER_COUNT * \
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(CONFIG_SHELL_BACKEND_SERIAL_ASYNC_RX_BUFFER_SIZE + \
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UART_ASYNC_RX_BUF_OVERHEAD))
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struct shell_uart_common {
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const struct device *dev;
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shell_transport_handler_t handler;
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void *context;
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bool blocking_tx;
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#ifdef CONFIG_MCUMGR_TRANSPORT_SHELL
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struct smp_shell_data smp;
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#endif /* CONFIG_MCUMGR_TRANSPORT_SHELL */
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};
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struct shell_uart_int_driven {
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struct shell_uart_common common;
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struct ring_buf tx_ringbuf;
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struct ring_buf rx_ringbuf;
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struct k_timer dtr_timer;
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atomic_t tx_busy;
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};
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struct shell_uart_async {
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struct shell_uart_common common;
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struct k_sem tx_sem;
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struct uart_async_rx async_rx;
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atomic_t pending_rx_req;
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};
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struct shell_uart_polling {
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struct shell_uart_common common;
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struct ring_buf rx_ringbuf;
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struct k_timer rx_timer;
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};
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static uint8_t __noinit async_rx_data[ASYNC_RX_BUF_SIZE];
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static uint8_t __noinit rx_ringbuf_data[CONFIG_SHELL_BACKEND_SERIAL_RX_RING_BUFFER_SIZE];
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static uint8_t __noinit tx_ringbuf_data[CONFIG_SHELL_BACKEND_SERIAL_TX_RING_BUFFER_SIZE];
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static struct shell_uart_int_driven shell_uart_i;
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static struct shell_uart_async shell_uart_a;
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static struct shell_uart_polling shell_uart_p;
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#ifdef CONFIG_MCUMGR_TRANSPORT_SHELL
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NET_BUF_POOL_DEFINE(smp_shell_rx_pool, CONFIG_MCUMGR_TRANSPORT_SHELL_RX_BUF_COUNT,
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SMP_SHELL_RX_BUF_SIZE, 0, NULL);
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#endif /* CONFIG_MCUMGR_TRANSPORT_SHELL */
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SHELL_UART_DEFINE(shell_transport_uart,
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CONFIG_SHELL_BACKEND_SERIAL_TX_RING_BUFFER_SIZE,
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CONFIG_SHELL_BACKEND_SERIAL_RX_RING_BUFFER_SIZE);
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SHELL_DEFINE(shell_uart, CONFIG_SHELL_PROMPT_UART, &shell_transport_uart,
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CONFIG_SHELL_BACKEND_SERIAL_LOG_MESSAGE_QUEUE_SIZE,
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CONFIG_SHELL_BACKEND_SERIAL_LOG_MESSAGE_QUEUE_TIMEOUT,
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SHELL_FLAG_OLF_CRLF);
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static void async_callback(const struct device *dev, struct uart_event *evt, void *user_data)
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{
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struct shell_uart_async *sh_uart = (struct shell_uart_async *)user_data;
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#ifdef CONFIG_SHELL_BACKEND_SERIAL_INTERRUPT_DRIVEN
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static void uart_rx_handle(const struct device *dev,
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const struct shell_uart *sh_uart)
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switch (evt->type) {
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case UART_TX_DONE:
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k_sem_give(&sh_uart->tx_sem);
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break;
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case UART_RX_RDY:
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uart_async_rx_on_rdy(&sh_uart->async_rx, evt->data.rx.buf, evt->data.rx.len);
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sh_uart->common.handler(SHELL_TRANSPORT_EVT_RX_RDY, sh_uart->common.context);
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break;
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case UART_RX_BUF_REQUEST:
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{
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uint8_t *buf = uart_async_rx_buf_req(&sh_uart->async_rx);
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size_t len = uart_async_rx_get_buf_len(&sh_uart->async_rx);
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if (buf) {
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int err = uart_rx_buf_rsp(dev, buf, len);
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if (err < 0) {
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uart_async_rx_on_buf_rel(&sh_uart->async_rx, buf);
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}
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} else {
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atomic_inc(&sh_uart->pending_rx_req);
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}
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break;
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}
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case UART_RX_BUF_RELEASED:
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uart_async_rx_on_buf_rel(&sh_uart->async_rx, evt->data.rx_buf.buf);
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break;
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case UART_RX_DISABLED:
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break;
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default:
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break;
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};
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}
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static void uart_rx_handle(const struct device *dev, struct shell_uart_int_driven *sh_uart)
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{
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uint8_t *data;
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uint32_t len;
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uint32_t rd_len;
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bool new_data = false;
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#ifdef CONFIG_MCUMGR_TRANSPORT_SHELL
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struct smp_shell_data *const smp = &sh_uart->ctrl_blk->smp;
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struct smp_shell_data *const smp = &sh_uart->common.smp;
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#endif
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do {
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len = ring_buf_put_claim(sh_uart->rx_ringbuf, &data,
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sh_uart->rx_ringbuf->size);
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len = ring_buf_put_claim(&sh_uart->rx_ringbuf, &data,
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sh_uart->rx_ringbuf.size);
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if (len > 0) {
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rd_len = uart_fifo_read(dev, data, len);
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@ -72,8 +164,7 @@ static void uart_rx_handle(const struct device *dev,
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}
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}
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#endif /* CONFIG_MCUMGR_TRANSPORT_SHELL */
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int err = ring_buf_put_finish(sh_uart->rx_ringbuf,
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rd_len);
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int err = ring_buf_put_finish(&sh_uart->rx_ringbuf, rd_len);
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(void)err;
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__ASSERT_NO_MSG(err == 0);
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} else {
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@ -87,8 +178,7 @@ static void uart_rx_handle(const struct device *dev,
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/* If successful in getting byte from the fifo, try
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* feeding it to SMP as a part of mcumgr frame.
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*/
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if ((rd_len != 0) &&
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(smp_shell_rx_bytes(smp, &dummy, 1) == 1)) {
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if ((rd_len != 0) && (smp_shell_rx_bytes(smp, &dummy, 1) == 1)) {
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new_data = true;
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}
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#endif /* CONFIG_MCUMGR_TRANSPORT_SHELL */
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@ -96,8 +186,7 @@ static void uart_rx_handle(const struct device *dev,
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} while (rd_len && (rd_len == len));
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if (new_data) {
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sh_uart->ctrl_blk->handler(SHELL_TRANSPORT_EVT_RX_RDY,
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sh_uart->ctrl_blk->context);
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sh_uart->common.handler(SHELL_TRANSPORT_EVT_RX_RDY, sh_uart->common.context);
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}
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}
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@ -123,19 +212,18 @@ static bool uart_dtr_check(const struct device *dev)
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static void dtr_timer_handler(struct k_timer *timer)
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{
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const struct shell_uart *sh_uart = k_timer_user_data_get(timer);
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struct shell_uart_int_driven *sh_uart = k_timer_user_data_get(timer);
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if (!uart_dtr_check(sh_uart->ctrl_blk->dev)) {
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if (!uart_dtr_check(sh_uart->common.dev)) {
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return;
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}
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/* DTR is active, stop timer and start TX */
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k_timer_stop(timer);
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uart_irq_tx_enable(sh_uart->ctrl_blk->dev);
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uart_irq_tx_enable(sh_uart->common.dev);
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}
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static void uart_tx_handle(const struct device *dev,
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const struct shell_uart *sh_uart)
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static void uart_tx_handle(const struct device *dev, struct shell_uart_int_driven *sh_uart)
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{
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uint32_t len;
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const uint8_t *data;
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@ -143,31 +231,30 @@ static void uart_tx_handle(const struct device *dev,
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if (!uart_dtr_check(dev)) {
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/* Wait for DTR signal before sending anything to output. */
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uart_irq_tx_disable(dev);
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k_timer_start(sh_uart->dtr_timer, K_MSEC(100), K_MSEC(100));
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k_timer_start(&sh_uart->dtr_timer, K_MSEC(100), K_MSEC(100));
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return;
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}
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len = ring_buf_get_claim(sh_uart->tx_ringbuf, (uint8_t **)&data,
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sh_uart->tx_ringbuf->size);
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len = ring_buf_get_claim(&sh_uart->tx_ringbuf, (uint8_t **)&data,
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sh_uart->tx_ringbuf.size);
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if (len) {
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int err;
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len = uart_fifo_fill(dev, data, len);
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err = ring_buf_get_finish(sh_uart->tx_ringbuf, len);
|
||||
err = ring_buf_get_finish(&sh_uart->tx_ringbuf, len);
|
||||
__ASSERT_NO_MSG(err == 0);
|
||||
ARG_UNUSED(err);
|
||||
} else {
|
||||
uart_irq_tx_disable(dev);
|
||||
sh_uart->ctrl_blk->tx_busy = 0;
|
||||
sh_uart->tx_busy = 0;
|
||||
}
|
||||
|
||||
sh_uart->ctrl_blk->handler(SHELL_TRANSPORT_EVT_TX_RDY,
|
||||
sh_uart->ctrl_blk->context);
|
||||
sh_uart->common.handler(SHELL_TRANSPORT_EVT_TX_RDY, sh_uart->common.context);
|
||||
}
|
||||
|
||||
static void uart_callback(const struct device *dev, void *user_data)
|
||||
{
|
||||
const struct shell_uart *sh_uart = (struct shell_uart *)user_data;
|
||||
struct shell_uart_int_driven *sh_uart = (struct shell_uart_int_driven *)user_data;
|
||||
|
||||
uart_irq_update(dev);
|
||||
|
||||
@ -179,80 +266,135 @@ static void uart_callback(const struct device *dev, void *user_data)
|
||||
uart_tx_handle(dev, sh_uart);
|
||||
}
|
||||
}
|
||||
#endif /* CONFIG_SHELL_BACKEND_SERIAL_INTERRUPT_DRIVEN */
|
||||
|
||||
static void uart_irq_init(const struct shell_uart *sh_uart)
|
||||
static void irq_init(struct shell_uart_int_driven *sh_uart)
|
||||
{
|
||||
#ifdef CONFIG_SHELL_BACKEND_SERIAL_INTERRUPT_DRIVEN
|
||||
const struct device *dev = sh_uart->ctrl_blk->dev;
|
||||
const struct device *dev = sh_uart->common.dev;
|
||||
|
||||
ring_buf_reset(sh_uart->tx_ringbuf);
|
||||
ring_buf_reset(sh_uart->rx_ringbuf);
|
||||
sh_uart->ctrl_blk->tx_busy = 0;
|
||||
ring_buf_init(&sh_uart->rx_ringbuf, CONFIG_SHELL_BACKEND_SERIAL_RX_RING_BUFFER_SIZE,
|
||||
rx_ringbuf_data);
|
||||
ring_buf_init(&sh_uart->tx_ringbuf, CONFIG_SHELL_BACKEND_SERIAL_TX_RING_BUFFER_SIZE,
|
||||
tx_ringbuf_data);
|
||||
sh_uart->tx_busy = 0;
|
||||
uart_irq_callback_user_data_set(dev, uart_callback, (void *)sh_uart);
|
||||
uart_irq_rx_enable(dev);
|
||||
|
||||
if (IS_ENABLED(CONFIG_SHELL_BACKEND_SERIAL_CHECK_DTR)) {
|
||||
k_timer_init(sh_uart->dtr_timer, dtr_timer_handler, NULL);
|
||||
k_timer_user_data_set(sh_uart->dtr_timer, (void *)sh_uart);
|
||||
k_timer_init(&sh_uart->dtr_timer, dtr_timer_handler, NULL);
|
||||
k_timer_user_data_set(&sh_uart->dtr_timer, (void *)sh_uart);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
static void timer_handler(struct k_timer *timer)
|
||||
static int rx_enable(const struct device *dev, uint8_t *buf, size_t len)
|
||||
{
|
||||
return uart_rx_enable(dev, buf, len, 10000);
|
||||
}
|
||||
|
||||
static void async_init(struct shell_uart_async *sh_uart)
|
||||
{
|
||||
static const struct uart_async_rx_config async_rx_config = {
|
||||
.buffer = async_rx_data,
|
||||
.length = sizeof(async_rx_data),
|
||||
.buf_cnt = CONFIG_SHELL_BACKEND_SERIAL_ASYNC_RX_BUFFER_COUNT
|
||||
};
|
||||
const struct device *dev = sh_uart->common.dev;
|
||||
struct uart_async_rx *async_rx = &sh_uart->async_rx;
|
||||
int err;
|
||||
|
||||
k_sem_init(&sh_uart->tx_sem, 0, 1);
|
||||
|
||||
err = uart_async_rx_init(async_rx, &async_rx_config);
|
||||
(void)err;
|
||||
__ASSERT_NO_MSG(err == 0);
|
||||
|
||||
uint8_t *buf = uart_async_rx_buf_req(async_rx);
|
||||
|
||||
err = uart_callback_set(dev, async_callback, (void *)sh_uart);
|
||||
(void)err;
|
||||
__ASSERT_NO_MSG(err == 0);
|
||||
|
||||
err = rx_enable(dev, buf, uart_async_rx_get_buf_len(async_rx));
|
||||
(void)err;
|
||||
__ASSERT_NO_MSG(err == 0);
|
||||
}
|
||||
|
||||
static void polling_rx_timeout_handler(struct k_timer *timer)
|
||||
{
|
||||
uint8_t c;
|
||||
const struct shell_uart *sh_uart = k_timer_user_data_get(timer);
|
||||
struct shell_uart_polling *sh_uart = k_timer_user_data_get(timer);
|
||||
|
||||
while (uart_poll_in(sh_uart->ctrl_blk->dev, &c) == 0) {
|
||||
if (ring_buf_put(sh_uart->rx_ringbuf, &c, 1) == 0U) {
|
||||
while (uart_poll_in(sh_uart->common.dev, &c) == 0) {
|
||||
if (ring_buf_put(&sh_uart->rx_ringbuf, &c, 1) == 0U) {
|
||||
/* ring buffer full. */
|
||||
LOG_WRN("RX ring buffer full.");
|
||||
}
|
||||
sh_uart->ctrl_blk->handler(SHELL_TRANSPORT_EVT_RX_RDY,
|
||||
sh_uart->ctrl_blk->context);
|
||||
sh_uart->common.handler(SHELL_TRANSPORT_EVT_RX_RDY, sh_uart->common.context);
|
||||
}
|
||||
}
|
||||
|
||||
static void polling_init(struct shell_uart_polling *sh_uart)
|
||||
{
|
||||
k_timer_init(&sh_uart->rx_timer, polling_rx_timeout_handler, NULL);
|
||||
k_timer_user_data_set(&sh_uart->rx_timer, (void *)sh_uart);
|
||||
k_timer_start(&sh_uart->rx_timer, RX_POLL_PERIOD, RX_POLL_PERIOD);
|
||||
|
||||
ring_buf_init(&sh_uart->rx_ringbuf, CONFIG_SHELL_BACKEND_SERIAL_RX_RING_BUFFER_SIZE,
|
||||
rx_ringbuf_data);
|
||||
}
|
||||
|
||||
static int init(const struct shell_transport *transport,
|
||||
const void *config,
|
||||
shell_transport_handler_t evt_handler,
|
||||
void *context)
|
||||
{
|
||||
const struct shell_uart *sh_uart = (struct shell_uart *)transport->ctx;
|
||||
struct shell_uart_common *common = (struct shell_uart_common *)transport->ctx;
|
||||
|
||||
sh_uart->ctrl_blk->dev = (const struct device *)config;
|
||||
sh_uart->ctrl_blk->handler = evt_handler;
|
||||
sh_uart->ctrl_blk->context = context;
|
||||
common->dev = (const struct device *)config;
|
||||
common->handler = evt_handler;
|
||||
common->context = context;
|
||||
|
||||
#ifdef CONFIG_MCUMGR_TRANSPORT_SHELL
|
||||
sh_uart->ctrl_blk->smp.buf_pool = &smp_shell_rx_pool;
|
||||
k_fifo_init(&sh_uart->ctrl_blk->smp.buf_ready);
|
||||
common->smp.buf_pool = &smp_shell_rx_pool;
|
||||
k_fifo_init(&common->smp.buf_ready);
|
||||
#endif
|
||||
|
||||
if (IS_ENABLED(CONFIG_SHELL_BACKEND_SERIAL_INTERRUPT_DRIVEN)) {
|
||||
uart_irq_init(sh_uart);
|
||||
if (IS_ENABLED(CONFIG_SHELL_BACKEND_SERIAL_API_ASYNC)) {
|
||||
async_init((struct shell_uart_async *)transport->ctx);
|
||||
} else if (IS_ENABLED(CONFIG_SHELL_BACKEND_SERIAL_API_INTERRUPT_DRIVEN)) {
|
||||
irq_init((struct shell_uart_int_driven *)transport->ctx);
|
||||
} else {
|
||||
k_timer_init(sh_uart->timer, timer_handler, NULL);
|
||||
k_timer_user_data_set(sh_uart->timer, (void *)sh_uart);
|
||||
k_timer_start(sh_uart->timer, RX_POLL_PERIOD, RX_POLL_PERIOD);
|
||||
polling_init((struct shell_uart_polling *)transport->ctx);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void irq_uninit(struct shell_uart_int_driven *sh_uart)
|
||||
{
|
||||
const struct device *dev = sh_uart->common.dev;
|
||||
|
||||
k_timer_stop(&sh_uart->dtr_timer);
|
||||
uart_irq_tx_disable(dev);
|
||||
uart_irq_rx_disable(dev);
|
||||
}
|
||||
|
||||
static void async_uninit(struct shell_uart_async *sh_uart)
|
||||
{
|
||||
}
|
||||
|
||||
static void polling_uninit(struct shell_uart_polling *sh_uart)
|
||||
{
|
||||
k_timer_stop(&sh_uart->rx_timer);
|
||||
}
|
||||
|
||||
static int uninit(const struct shell_transport *transport)
|
||||
{
|
||||
const struct shell_uart *sh_uart = (struct shell_uart *)transport->ctx;
|
||||
|
||||
if (IS_ENABLED(CONFIG_SHELL_BACKEND_SERIAL_INTERRUPT_DRIVEN)) {
|
||||
const struct device *dev = sh_uart->ctrl_blk->dev;
|
||||
|
||||
k_timer_stop(sh_uart->dtr_timer);
|
||||
uart_irq_tx_disable(dev);
|
||||
uart_irq_rx_disable(dev);
|
||||
if (IS_ENABLED(CONFIG_SHELL_BACKEND_SERIAL_API_ASYNC)) {
|
||||
async_uninit((struct shell_uart_async *)transport->ctx);
|
||||
} else if (IS_ENABLED(CONFIG_SHELL_BACKEND_SERIAL_API_INTERRUPT_DRIVEN)) {
|
||||
irq_uninit((struct shell_uart_int_driven *)transport->ctx);
|
||||
} else {
|
||||
k_timer_stop(sh_uart->timer);
|
||||
polling_uninit((struct shell_uart_polling *)transport->ctx);
|
||||
}
|
||||
|
||||
return 0;
|
||||
@ -260,49 +402,138 @@ static int uninit(const struct shell_transport *transport)
|
||||
|
||||
static int enable(const struct shell_transport *transport, bool blocking_tx)
|
||||
{
|
||||
const struct shell_uart *sh_uart = (struct shell_uart *)transport->ctx;
|
||||
struct shell_uart_common *sh_uart = (struct shell_uart_common *)transport->ctx;
|
||||
|
||||
sh_uart->ctrl_blk->blocking_tx = blocking_tx;
|
||||
sh_uart->blocking_tx = blocking_tx;
|
||||
|
||||
if (blocking_tx) {
|
||||
#ifdef CONFIG_SHELL_BACKEND_SERIAL_INTERRUPT_DRIVEN
|
||||
uart_irq_tx_disable(sh_uart->ctrl_blk->dev);
|
||||
#endif
|
||||
if (IS_ENABLED(CONFIG_SHELL_BACKEND_SERIAL_API_INTERRUPT_DRIVEN) && blocking_tx) {
|
||||
uart_irq_tx_disable(sh_uart->dev);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void irq_write(const struct shell_uart *sh_uart, const void *data,
|
||||
size_t length, size_t *cnt)
|
||||
static int polling_write(struct shell_uart_common *sh_uart,
|
||||
const void *data, size_t length, size_t *cnt)
|
||||
{
|
||||
*cnt = ring_buf_put(sh_uart->tx_ringbuf, data, length);
|
||||
const uint8_t *data8 = (const uint8_t *)data;
|
||||
|
||||
if (atomic_set(&sh_uart->ctrl_blk->tx_busy, 1) == 0) {
|
||||
#ifdef CONFIG_SHELL_BACKEND_SERIAL_INTERRUPT_DRIVEN
|
||||
uart_irq_tx_enable(sh_uart->ctrl_blk->dev);
|
||||
#endif
|
||||
for (size_t i = 0; i < length; i++) {
|
||||
uart_poll_out(sh_uart->dev, data8[i]);
|
||||
}
|
||||
|
||||
*cnt = length;
|
||||
|
||||
sh_uart->handler(SHELL_TRANSPORT_EVT_TX_RDY, sh_uart->context);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int irq_write(struct shell_uart_int_driven *sh_uart,
|
||||
const void *data, size_t length, size_t *cnt)
|
||||
{
|
||||
*cnt = ring_buf_put(&sh_uart->tx_ringbuf, data, length);
|
||||
|
||||
if (atomic_set(&sh_uart->tx_busy, 1) == 0) {
|
||||
uart_irq_tx_enable(sh_uart->common.dev);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int async_write(struct shell_uart_async *sh_uart,
|
||||
const void *data, size_t length, size_t *cnt)
|
||||
{
|
||||
int err;
|
||||
|
||||
err = uart_tx(sh_uart->common.dev, data, length, SYS_FOREVER_US);
|
||||
if (err < 0) {
|
||||
*cnt = 0;
|
||||
return err;
|
||||
}
|
||||
|
||||
err = k_sem_take(&sh_uart->tx_sem, K_FOREVER);
|
||||
*cnt = length;
|
||||
|
||||
sh_uart->common.handler(SHELL_TRANSPORT_EVT_TX_RDY, sh_uart->common.context);
|
||||
|
||||
return err;
|
||||
}
|
||||
|
||||
static int write(const struct shell_transport *transport,
|
||||
const void *data, size_t length, size_t *cnt)
|
||||
{
|
||||
const struct shell_uart *sh_uart = (struct shell_uart *)transport->ctx;
|
||||
const uint8_t *data8 = (const uint8_t *)data;
|
||||
struct shell_uart_common *sh_uart = (struct shell_uart_common *)transport->ctx;
|
||||
|
||||
if (IS_ENABLED(CONFIG_SHELL_BACKEND_SERIAL_INTERRUPT_DRIVEN) &&
|
||||
!sh_uart->ctrl_blk->blocking_tx) {
|
||||
irq_write(sh_uart, data, length, cnt);
|
||||
if (IS_ENABLED(CONFIG_SHELL_BACKEND_SERIAL_API_POLLING) || sh_uart->blocking_tx) {
|
||||
return polling_write(sh_uart, data, length, cnt);
|
||||
} else if (IS_ENABLED(CONFIG_SHELL_BACKEND_SERIAL_API_INTERRUPT_DRIVEN)) {
|
||||
return irq_write((struct shell_uart_int_driven *)transport->ctx, data, length, cnt);
|
||||
} else {
|
||||
for (size_t i = 0; i < length; i++) {
|
||||
uart_poll_out(sh_uart->ctrl_blk->dev, data8[i]);
|
||||
return async_write((struct shell_uart_async *)transport->ctx, data, length, cnt);
|
||||
}
|
||||
}
|
||||
|
||||
static int irq_read(struct shell_uart_int_driven *sh_uart,
|
||||
void *data, size_t length, size_t *cnt)
|
||||
{
|
||||
*cnt = ring_buf_get(&sh_uart->rx_ringbuf, data, length);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int polling_read(struct shell_uart_polling *sh_uart,
|
||||
void *data, size_t length, size_t *cnt)
|
||||
{
|
||||
*cnt = ring_buf_get(&sh_uart->rx_ringbuf, data, length);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int async_read(struct shell_uart_async *sh_uart,
|
||||
void *data, size_t length, size_t *cnt)
|
||||
{
|
||||
uint8_t *buf;
|
||||
size_t blen;
|
||||
struct uart_async_rx *async_rx = &sh_uart->async_rx;
|
||||
|
||||
blen = uart_async_rx_data_claim(async_rx, &buf, length);
|
||||
#ifdef CONFIG_MCUMGR_TRANSPORT_SHELL
|
||||
struct smp_shell_data *const smp = &sh_uart->common.smp;
|
||||
size_t sh_cnt = 0;
|
||||
|
||||
for (size_t i = 0; i < blen; i++) {
|
||||
if (smp_shell_rx_bytes(smp, &buf[i], 1) == 0) {
|
||||
data[sh_cnt++] = buf[i];
|
||||
}
|
||||
}
|
||||
#else
|
||||
size_t sh_cnt = blen;
|
||||
|
||||
*cnt = length;
|
||||
memcpy(data, buf, blen);
|
||||
#endif
|
||||
uart_async_rx_data_consume(async_rx, sh_cnt);
|
||||
*cnt = sh_cnt;
|
||||
|
||||
sh_uart->ctrl_blk->handler(SHELL_TRANSPORT_EVT_TX_RDY,
|
||||
sh_uart->ctrl_blk->context);
|
||||
if (sh_uart->pending_rx_req) {
|
||||
uint8_t *buf = uart_async_rx_buf_req(async_rx);
|
||||
|
||||
if (buf) {
|
||||
int err;
|
||||
size_t len = uart_async_rx_get_buf_len(async_rx);
|
||||
|
||||
atomic_dec(&sh_uart->pending_rx_req);
|
||||
err = uart_rx_buf_rsp(sh_uart->common.dev, buf, len);
|
||||
/* If it is too late and RX is disabled then re-enable it. */
|
||||
if (err < 0) {
|
||||
if (err == -EACCES) {
|
||||
sh_uart->pending_rx_req = 0;
|
||||
err = rx_enable(sh_uart->common.dev, buf, len);
|
||||
} else {
|
||||
return err;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
return 0;
|
||||
@ -311,19 +542,21 @@ static int write(const struct shell_transport *transport,
|
||||
static int read(const struct shell_transport *transport,
|
||||
void *data, size_t length, size_t *cnt)
|
||||
{
|
||||
struct shell_uart *sh_uart = (struct shell_uart *)transport->ctx;
|
||||
|
||||
*cnt = ring_buf_get(sh_uart->rx_ringbuf, data, length);
|
||||
|
||||
return 0;
|
||||
if (IS_ENABLED(CONFIG_SHELL_BACKEND_SERIAL_API_INTERRUPT_DRIVEN)) {
|
||||
return irq_read((struct shell_uart_int_driven *)transport->ctx, data, length, cnt);
|
||||
} else if (IS_ENABLED(CONFIG_SHELL_BACKEND_SERIAL_API_ASYNC)) {
|
||||
return async_read((struct shell_uart_async *)transport->ctx, data, length, cnt);
|
||||
} else {
|
||||
return polling_read((struct shell_uart_polling *)transport->ctx, data, length, cnt);
|
||||
}
|
||||
}
|
||||
|
||||
#ifdef CONFIG_MCUMGR_TRANSPORT_SHELL
|
||||
static void update(const struct shell_transport *transport)
|
||||
{
|
||||
struct shell_uart *sh_uart = (struct shell_uart *)transport->ctx;
|
||||
struct shell_uart_common *sh_uart = (struct shell_uart_common *)transport->ctx;
|
||||
|
||||
smp_shell_process(&sh_uart->ctrl_blk->smp);
|
||||
smp_shell_process(&sh_uart->smp);
|
||||
}
|
||||
#endif /* CONFIG_MCUMGR_TRANSPORT_SHELL */
|
||||
|
||||
@ -338,6 +571,18 @@ const struct shell_transport_api shell_uart_transport_api = {
|
||||
#endif /* CONFIG_MCUMGR_TRANSPORT_SHELL */
|
||||
};
|
||||
|
||||
struct shell_transport shell_transport_uart = {
|
||||
.api = &shell_uart_transport_api,
|
||||
.ctx = IS_ENABLED(CONFIG_SHELL_BACKEND_SERIAL_API_POLLING) ? (void *)&shell_uart_p :
|
||||
(IS_ENABLED(CONFIG_SHELL_BACKEND_SERIAL_API_ASYNC) ? (void *)&shell_uart_a :
|
||||
(void *)&shell_uart_i)
|
||||
};
|
||||
|
||||
SHELL_DEFINE(shell_uart, CONFIG_SHELL_PROMPT_UART, &shell_transport_uart,
|
||||
CONFIG_SHELL_BACKEND_SERIAL_LOG_MESSAGE_QUEUE_SIZE,
|
||||
CONFIG_SHELL_BACKEND_SERIAL_LOG_MESSAGE_QUEUE_TIMEOUT,
|
||||
SHELL_FLAG_OLF_CRLF);
|
||||
|
||||
static int enable_shell_uart(void)
|
||||
{
|
||||
const struct device *const dev = DEVICE_DT_GET(DT_CHOSEN(zephyr_shell_uart));
|
||||
|
||||
Loading…
Reference in New Issue
Block a user