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x86: pcie: fallback to config via PIO

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When probing for PCI-E device resources, it is possible that
configuration via MMIO is not available. This may caused by
BIOS or its settings. So when CONFIG_PCIE_MMIO_CFG=y, have
a fallback path to config devices via PIO. The inability to
config via MMIO has been observed on a couple UP Squared
boards.

Fixes #27339

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This commit is contained in:
Daniel Leung 2020-09-15 12:53:20 -07:00 committed by Maureen Helm
parent dd8f135e2c
commit 5632ee26f3
1 changed files with 17 additions and 3 deletions
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20
arch/x86/core/pcie.c
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@ -17,6 +17,7 @@
#endif
/* PCI Express Extended Configuration Mechanism (MMIO) */
#ifdef CONFIG_PCIE_MMIO_CFG
#define MAX_PCI_BUS_SEGMENTS 4
@ -26,6 +27,8 @@ static struct {
uint8_t *mmio;
} bus_segs[MAX_PCI_BUS_SEGMENTS];
static bool do_pcie_mmio_cfg;
static void pcie_mm_init(void)
{
#ifdef CONFIG_ACPI
@ -49,6 +52,8 @@ static void pcie_mm_init(void)
device_map((mm_reg_t *)&bus_segs[i].mmio, phys_addr,
size, K_MEM_CACHE_NONE);
}
do_pcie_mmio_cfg = true;
}
#endif
}
@ -60,6 +65,10 @@ static inline void pcie_mm_conf(pcie_bdf_t bdf, unsigned int reg,
pcie_mm_init();
}
if (do_pcie_mmio_cfg == false) {
return;
}
for (int i = 0; i < ARRAY_SIZE(bus_segs); i++) {
int off = PCIE_BDF_TO_BUS(bdf) - bus_segs[i].start_bus;
@ -80,6 +89,8 @@ static inline void pcie_mm_conf(pcie_bdf_t bdf, unsigned int reg,
}
}
#endif /* CONFIG_PCIE_MMIO_CFG */
/* Traditional Configuration Mechanism */
#define PCIE_X86_CAP 0xCF8U /* Configuration Address Port */
@ -122,10 +133,13 @@ static inline void pcie_conf(pcie_bdf_t bdf, unsigned int reg,
{
#ifdef CONFIG_PCIE_MMIO_CFG
pcie_mm_conf(bdf, reg, write, data);
#else
pcie_io_conf(bdf, reg, write, data);
if (do_pcie_mmio_cfg) {
pcie_mm_conf(bdf, reg, write, data);
} else
#endif
{
pcie_io_conf(bdf, reg, write, data);
}
}
/* these functions are explained in include/drivers/pcie/pcie.h */