bartoszek/zephyr
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

drivers: mipi_dbi: stm32: get fmc frequency correctly

Browse Source 
Use clock api to get correct FMC clock frequency.

Signed-off-by: Georgij Černyšiov <geo.cgv@gmail.com>
This commit is contained in:
Georgij Černyšiov 2025-07-19 18:22:01 +02:00 committed by Benjamin Cabé
parent 38c3225af6
commit 54e16c4ad2
3 changed files with 42 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

23
drivers/memc/memc_stm32.c
View File

@ -9,6 +9,7 @@
#include <zephyr/drivers/clock_control/stm32_clock_control.h>
#include <zephyr/drivers/pinctrl.h>
#include <zephyr/drivers/memc/memc_stm32.h>
#include <zephyr/logging/log.h>
LOG_MODULE_REGISTER(memc_stm32, CONFIG_MEMC_LOG_LEVEL);
@ -86,6 +87,28 @@ static int memc_stm32_init(const struct device *dev)
return 0;
}
int memc_stm32_fmc_clock_rate(uint32_t *freq)
{
const struct device *dev = DEVICE_DT_GET_ONE(DT_DRV_COMPAT);
const struct memc_stm32_config *config = dev->config;
if (IS_ENABLED(STM32_FMC_DOMAIN_CLOCK_SUPPORT) && (config->pclk_len > 1)) {
if (clock_control_get_rate(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE),
(clock_control_subsys_t)&config->pclken[1],
freq) < 0) {
return -EIO;
}
} else {
if (clock_control_get_rate(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE),
(clock_control_subsys_t)&config->pclken[0],
freq) < 0) {
return -EIO;
}
}
return 0;
}
PINCTRL_DT_INST_DEFINE(0);
static const struct stm32_pclken pclken[] = STM32_DT_INST_CLOCKS(0);

10
drivers/mipi_dbi/mipi_dbi_stm32_fmc.c
View File

@ -9,6 +9,7 @@
#include <zephyr/drivers/gpio.h>
#include <zephyr/drivers/mipi_dbi.h>
#include <zephyr/drivers/clock_control/stm32_clock_control.h>
#include <zephyr/drivers/memc/memc_stm32.h>
#include <zephyr/sys/barrier.h>
#include <zephyr/sys/sys_io.h>
#include <zephyr/sys/byteorder.h>
@ -38,6 +39,7 @@ int mipi_dbi_stm32_fmc_check_config(const struct device *dev,
const struct mipi_dbi_stm32_fmc_config *config = dev->config;
struct mipi_dbi_stm32_fmc_data *data = dev->data;
uint32_t fmc_write_cycles;
uint32_t fmc_freq;
if (data->dbi_config == dbi_config) {
return 0;
@ -53,14 +55,16 @@ int mipi_dbi_stm32_fmc_check_config(const struct device *dev,
return -EINVAL;
}
uint32_t hclk_freq =
STM32_AHB_PRESCALER * DT_PROP(STM32_CLOCK_CONTROL_NODE, clock_frequency);
if (memc_stm32_fmc_clock_rate(&fmc_freq) < 0) {
LOG_ERR("Unable to get FMC frequency");
return -EINVAL;
}
/* According to the FMC documentation*/
fmc_write_cycles =
((config->fmc_address_setup_time + 1) + (config->fmc_data_setup_time + 1)) * 1;
if (hclk_freq / fmc_write_cycles > dbi_config->config.frequency) {
if (fmc_freq / fmc_write_cycles > dbi_config->config.frequency) {
LOG_ERR("Frequency is too high for the display controller");
return -EINVAL;
}

12
include/zephyr/drivers/memc/memc_stm32.h Normal file
View File

@ -0,0 +1,12 @@
/*
* Copyright (c) 2025 Georgij Cernysiov <geo.cgv@gmail.com>
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef ZEPHYR_INCLUDE_MEMC_STM32_H_
#define ZEPHYR_INCLUDE_MEMC_STM32_H_
int memc_stm32_fmc_clock_rate(uint32_t *rate);
#endif /* ZEPHYR_INCLUDE_MEMC_STM32_H_ */