diff --git a/boards/arm/mimxrt1010_evk/pinmux.c b/boards/arm/mimxrt1010_evk/pinmux.c index a9e3ae73bbe..20ffcd04e01 100644 --- a/boards/arm/mimxrt1010_evk/pinmux.c +++ b/boards/arm/mimxrt1010_evk/pinmux.c @@ -15,7 +15,7 @@ static int mimxrt1010_evk_init(struct device *dev) CLOCK_EnableClock(kCLOCK_Iomuxc); CLOCK_EnableClock(kCLOCK_IomuxcSnvs); -#ifdef CONFIG_GPIO_MCUX_IGPIO_1 +#if DT_HAS_NODE(DT_NODELABEL(gpio1)) IOMUXC_SetPinMux(IOMUXC_GPIO_11_GPIOMUX_IO11, 0); IOMUXC_SetPinConfig(IOMUXC_GPIO_11_GPIOMUX_IO11, IOMUXC_SW_PAD_CTL_PAD_PKE_MASK | @@ -26,7 +26,7 @@ static int mimxrt1010_evk_init(struct device *dev) IOMUXC_GPR->GPR26 &= ~(IOMUXC_GPR_GPR26_GPIO_SEL(1 << 11)); #endif -#ifdef CONFIG_GPIO_MCUX_IGPIO_2 +#if DT_HAS_NODE(DT_NODELABEL(gpio2)) IOMUXC_SetPinMux(IOMUXC_GPIO_SD_05_GPIO2_IO05, 0); IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_05_GPIO2_IO05, IOMUXC_SW_PAD_CTL_PAD_PKE_MASK | @@ -36,7 +36,7 @@ static int mimxrt1010_evk_init(struct device *dev) IOMUXC_SW_PAD_CTL_PAD_DSE(4)); #endif -#ifdef CONFIG_UART_MCUX_LPUART_1 +#if DT_HAS_NODE(DT_NODELABEL(lpuart1)) /* LPUART1 TX/RX */ IOMUXC_SetPinMux(IOMUXC_GPIO_09_LPUART1_RXD, 0); IOMUXC_SetPinMux(IOMUXC_GPIO_10_LPUART1_TXD, 0); @@ -52,7 +52,7 @@ static int mimxrt1010_evk_init(struct device *dev) IOMUXC_SW_PAD_CTL_PAD_DSE(6)); #endif -#ifdef CONFIG_I2C_1 +#if DT_HAS_NODE(DT_NODELABEL(lpi2c1)) /* LPI2C1 SCL, SDA */ IOMUXC_SetPinMux(IOMUXC_GPIO_01_LPI2C1_SDA, 1); IOMUXC_SetPinMux(IOMUXC_GPIO_02_LPI2C1_SCL, 1); diff --git a/boards/arm/mimxrt1015_evk/pinmux.c b/boards/arm/mimxrt1015_evk/pinmux.c index 444d7f327c3..49e64bca7a9 100644 --- a/boards/arm/mimxrt1015_evk/pinmux.c +++ b/boards/arm/mimxrt1015_evk/pinmux.c @@ -15,7 +15,7 @@ static int mimxrt1015_evk_init(struct device *dev) CLOCK_EnableClock(kCLOCK_Iomuxc); CLOCK_EnableClock(kCLOCK_IomuxcSnvs); -#ifdef CONFIG_GPIO_MCUX_IGPIO_2 +#if DT_HAS_NODE(DT_NODELABEL(gpio2)) IOMUXC_SetPinMux(IOMUXC_GPIO_EMC_09_GPIO2_IO09, 0); IOMUXC_SetPinConfig(IOMUXC_GPIO_EMC_09_GPIO2_IO09, IOMUXC_SW_PAD_CTL_PAD_PKE_MASK | @@ -25,7 +25,7 @@ static int mimxrt1015_evk_init(struct device *dev) IOMUXC_SW_PAD_CTL_PAD_DSE(4)); #endif -#ifdef CONFIG_UART_MCUX_LPUART_1 +#if DT_HAS_NODE(DT_NODELABEL(lpuart1)) /* LPUART1 TX/RX */ IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_06_LPUART1_TX, 0); IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_07_LPUART1_RX, 0); @@ -41,7 +41,7 @@ static int mimxrt1015_evk_init(struct device *dev) IOMUXC_SW_PAD_CTL_PAD_DSE(6)); #endif -#ifdef CONFIG_UART_MCUX_LPUART_4 +#if DT_HAS_NODE(DT_NODELABEL(lpuart4)) /* LPUART4 TX/RX */ IOMUXC_SetPinMux(IOMUXC_GPIO_EMC_32_LPUART4_TX, 0); IOMUXC_SetPinMux(IOMUXC_GPIO_EMC_33_LPUART4_RX, 0); @@ -57,7 +57,7 @@ static int mimxrt1015_evk_init(struct device *dev) IOMUXC_SW_PAD_CTL_PAD_DSE(6)); #endif -#ifdef CONFIG_I2C_1 +#if DT_HAS_NODE(DT_NODELABEL(lpi2c1)) /* LPI2C1 SCL, SDA */ IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_14_LPI2C1_SCL, 1); IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_15_LPI2C1_SDA, 1); diff --git a/boards/arm/mimxrt1020_evk/pinmux.c b/boards/arm/mimxrt1020_evk/pinmux.c index e404b9fd315..324426d0310 100644 --- a/boards/arm/mimxrt1020_evk/pinmux.c +++ b/boards/arm/mimxrt1020_evk/pinmux.c @@ -8,7 +8,7 @@ #include #include -#ifdef CONFIG_ETH_MCUX_0 +#if DT_HAS_NODE(DT_NODELABEL(enet)) static gpio_pin_config_t enet_gpio_config = { .direction = kGPIO_DigitalOutput, .outputLogic = 0, @@ -34,7 +34,7 @@ static int mimxrt1020_evk_init(struct device *dev) /* SW0 */ IOMUXC_SetPinMux(IOMUXC_SNVS_WAKEUP_GPIO5_IO00, 0); -#ifdef CONFIG_UART_MCUX_LPUART_1 +#if DT_HAS_NODE(DT_NODELABEL(lpuart1)) /* LPUART1 TX/RX */ IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_06_LPUART1_TX, 0); IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_07_LPUART1_RX, 0); @@ -50,7 +50,7 @@ static int mimxrt1020_evk_init(struct device *dev) IOMUXC_SW_PAD_CTL_PAD_DSE(6)); #endif -#ifdef CONFIG_UART_MCUX_LPUART_2 +#if DT_HAS_NODE(DT_NODELABEL(lpuart2)) /* LPUART2 TX/RX */ IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_08_LPUART2_TX, 0); IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_09_LPUART2_RX, 0); @@ -66,7 +66,7 @@ static int mimxrt1020_evk_init(struct device *dev) IOMUXC_SW_PAD_CTL_PAD_DSE(6)); #endif -#ifdef CONFIG_I2C_1 +#if DT_HAS_NODE(DT_NODELABEL(lpi2c1)) /* LPI2C1 SCL, SDA */ IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_14_LPI2C1_SCL, 1); IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_15_LPI2C1_SDA, 1); @@ -86,7 +86,7 @@ static int mimxrt1020_evk_init(struct device *dev) IOMUXC_SW_PAD_CTL_PAD_DSE(6)); #endif -#ifdef CONFIG_I2C_4 +#if DT_HAS_NODE(DT_NODELABEL(lpi2c4)) /* LPI2C4 SCL, SDA */ IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B1_02_LPI2C4_SCL, 1); IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B1_03_LPI2C4_SDA, 1); @@ -106,7 +106,7 @@ static int mimxrt1020_evk_init(struct device *dev) IOMUXC_SW_PAD_CTL_PAD_DSE(6)); #endif -#ifdef CONFIG_ETH_MCUX_0 +#if DT_HAS_NODE(DT_NODELABEL(enet)) IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_04_GPIO1_IO04, 0U); IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_06_GPIO1_IO22, 0U); IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_10_ENET_RDATA00, 0); @@ -147,7 +147,7 @@ static int mimxrt1020_evk_init(struct device *dev) return 0; } -#ifdef CONFIG_ETH_MCUX_0 +#if DT_HAS_NODE(DT_NODELABEL(enet)) static int mimxrt1020_evk_phy_reset(struct device *dev) { /* RESET PHY chip. */ @@ -159,6 +159,6 @@ static int mimxrt1020_evk_phy_reset(struct device *dev) #endif SYS_INIT(mimxrt1020_evk_init, PRE_KERNEL_1, 0); -#ifdef CONFIG_ETH_MCUX_0 +#if DT_HAS_NODE(DT_NODELABEL(enet)) SYS_INIT(mimxrt1020_evk_phy_reset, PRE_KERNEL_2, 0); #endif diff --git a/boards/arm/mimxrt1050_evk/pinmux.c b/boards/arm/mimxrt1050_evk/pinmux.c index 44d2bb44d27..addcc7c0bd0 100644 --- a/boards/arm/mimxrt1050_evk/pinmux.c +++ b/boards/arm/mimxrt1050_evk/pinmux.c @@ -9,7 +9,7 @@ #include #include -#ifdef CONFIG_ETH_MCUX_0 +#if DT_HAS_NODE(DT_NODELABEL(enet)) static gpio_pin_config_t enet_gpio_config = { .direction = kGPIO_DigitalOutput, .outputLogic = 0, @@ -17,7 +17,7 @@ static gpio_pin_config_t enet_gpio_config = { }; #endif -#ifdef CONFIG_DISK_ACCESS_USDHC1 +#if DT_HAS_NODE(DT_NODELABEL(usdhc1)) && CONFIG_DISK_ACCESS_USDHC1 /*Drive Strength Field: R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR) *Speed Field: medium(100MHz) @@ -109,7 +109,7 @@ static int mimxrt1050_evk_init(struct device *dev) CLOCK_EnableClock(kCLOCK_Iomuxc); CLOCK_EnableClock(kCLOCK_IomuxcSnvs); -#ifndef CONFIG_ETH_MCUX_0 +#if !DT_HAS_NODE(DT_NODELABEL(enet)) /* LED */ IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_09_GPIO1_IO09, 0); @@ -122,7 +122,7 @@ static int mimxrt1050_evk_init(struct device *dev) IOMUXC_SetPinMux(IOMUXC_SNVS_WAKEUP_GPIO5_IO00, 0); #endif -#ifdef CONFIG_UART_MCUX_LPUART_1 +#if DT_HAS_NODE(DT_NODELABEL(lpuart1)) /* LPUART1 TX/RX */ IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_12_LPUART1_TX, 0); IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_13_LPUART1_RX, 0); @@ -138,7 +138,7 @@ static int mimxrt1050_evk_init(struct device *dev) IOMUXC_SW_PAD_CTL_PAD_DSE(6)); #endif -#ifdef CONFIG_UART_MCUX_LPUART_3 +#if DT_HAS_NODE(DT_NODELABEL(lpuart3)) /* LPUART3 TX/RX */ IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_06_LPUART3_TX, 0); IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_07_LPUART3_RX, 0); @@ -154,7 +154,7 @@ static int mimxrt1050_evk_init(struct device *dev) IOMUXC_SW_PAD_CTL_PAD_DSE(6)); #endif -#ifdef CONFIG_I2C_1 +#if DT_HAS_NODE(DT_NODELABEL(lpi2c1)) /* LPI2C1 SCL, SDA */ IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_00_LPI2C1_SCL, 1); IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_01_LPI2C1_SDA, 1); @@ -174,7 +174,7 @@ static int mimxrt1050_evk_init(struct device *dev) IOMUXC_SW_PAD_CTL_PAD_DSE(6)); #endif -#ifdef CONFIG_SPI_3 +#if DT_HAS_NODE(DT_NODELABEL(lpspi3)) /* LPSPI3 SCK, SDO, SDI, PCS0 */ IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_00_LPSPI3_SCK, 0); IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_01_LPSPI3_SDO, 0); @@ -202,7 +202,7 @@ static int mimxrt1050_evk_init(struct device *dev) IOMUXC_SW_PAD_CTL_PAD_DSE(6)); #endif -#ifdef CONFIG_ETH_MCUX_0 +#if DT_HAS_NODE(DT_NODELABEL(enet)) IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_09_GPIO1_IO09, 0U); IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_10_GPIO1_IO10, 0U); IOMUXC_SetPinMux(IOMUXC_GPIO_B1_04_ENET_RX_DATA00, 0); @@ -240,7 +240,7 @@ static int mimxrt1050_evk_init(struct device *dev) GPIO_WritePinOutput(GPIO1, 9, 0); #endif -#ifdef CONFIG_DISPLAY_MCUX_ELCDIF +#if DT_HAS_NODE(DT_NODELABEL(lcdif)) IOMUXC_SetPinMux(IOMUXC_GPIO_B0_00_LCD_CLK, 0); IOMUXC_SetPinMux(IOMUXC_GPIO_B0_01_LCD_ENABLE, 0); IOMUXC_SetPinMux(IOMUXC_GPIO_B0_02_LCD_HSYNC, 0); @@ -299,7 +299,7 @@ static int mimxrt1050_evk_init(struct device *dev) GPIO_PinInit(GPIO2, 31, &config); #endif -#ifdef CONFIG_DISK_ACCESS_USDHC1 +#if DT_HAS_NODE(DT_NODELABEL(usdhc1)) && CONFIG_DISK_ACCESS_USDHC1 mimxrt1050_evk_usdhc_pinmux(0, true, 2, 1); imxrt_usdhc_pinmux_cb_register(mimxrt1050_evk_usdhc_pinmux); #endif @@ -307,7 +307,7 @@ static int mimxrt1050_evk_init(struct device *dev) return 0; } -#ifdef CONFIG_ETH_MCUX_0 +#if DT_HAS_NODE(DT_NODELABEL(enet)) static int mimxrt1050_evk_phy_reset(struct device *dev) { /* RESET PHY chip. */ @@ -319,6 +319,6 @@ static int mimxrt1050_evk_phy_reset(struct device *dev) #endif SYS_INIT(mimxrt1050_evk_init, PRE_KERNEL_1, 0); -#ifdef CONFIG_ETH_MCUX_0 +#if DT_HAS_NODE(DT_NODELABEL(enet)) SYS_INIT(mimxrt1050_evk_phy_reset, PRE_KERNEL_2, 0); #endif diff --git a/boards/arm/mimxrt1060_evk/pinmux.c b/boards/arm/mimxrt1060_evk/pinmux.c index 4f5c7809788..79165158f06 100644 --- a/boards/arm/mimxrt1060_evk/pinmux.c +++ b/boards/arm/mimxrt1060_evk/pinmux.c @@ -9,7 +9,7 @@ #include #include -#ifdef CONFIG_ETH_MCUX_0 +#if DT_HAS_NODE(DT_NODELABEL(enet)) static gpio_pin_config_t enet_gpio_config = { .direction = kGPIO_DigitalOutput, .outputLogic = 0, @@ -24,7 +24,7 @@ static int mimxrt1060_evk_init(struct device *dev) CLOCK_EnableClock(kCLOCK_Iomuxc); CLOCK_EnableClock(kCLOCK_IomuxcSnvs); -#ifndef CONFIG_ETH_MCUX_0 +#if !DT_HAS_NODE(DT_NODELABEL(enet)) /* LED */ IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_09_GPIO1_IO09, 0); @@ -37,7 +37,7 @@ static int mimxrt1060_evk_init(struct device *dev) IOMUXC_SetPinMux(IOMUXC_SNVS_WAKEUP_GPIO5_IO00, 0); #endif -#ifdef CONFIG_UART_MCUX_LPUART_1 +#if DT_HAS_NODE(DT_NODELABEL(lpuart1)) /* LPUART1 TX/RX */ IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_12_LPUART1_TX, 0); IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_13_LPUART1_RX, 0); @@ -53,7 +53,7 @@ static int mimxrt1060_evk_init(struct device *dev) IOMUXC_SW_PAD_CTL_PAD_DSE(6)); #endif -#ifdef CONFIG_UART_MCUX_LPUART_3 +#if DT_HAS_NODE(DT_NODELABEL(lpuart3)) /* LPUART3 TX/RX */ IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_06_LPUART3_TX, 0); IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_07_LPUART3_RX, 0); @@ -69,7 +69,7 @@ static int mimxrt1060_evk_init(struct device *dev) IOMUXC_SW_PAD_CTL_PAD_DSE(6)); #endif -#ifdef CONFIG_I2C_1 +#if DT_HAS_NODE(DT_NODELABEL(lpi2c1)) /* LPI2C1 SCL, SDA */ IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_00_LPI2C1_SCL, 1); IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_01_LPI2C1_SDA, 1); @@ -89,7 +89,7 @@ static int mimxrt1060_evk_init(struct device *dev) IOMUXC_SW_PAD_CTL_PAD_DSE(6)); #endif -#ifdef CONFIG_ETH_MCUX_0 +#if DT_HAS_NODE(DT_NODELABEL(enet)) IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_09_GPIO1_IO09, 0U); IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_10_GPIO1_IO10, 0U); IOMUXC_SetPinMux(IOMUXC_GPIO_B1_04_ENET_RX_DATA00, 0); @@ -127,7 +127,7 @@ static int mimxrt1060_evk_init(struct device *dev) GPIO_WritePinOutput(GPIO1, 9, 0); #endif -#ifdef CONFIG_DISPLAY_MCUX_ELCDIF +#if DT_HAS_NODE(DT_NODELABEL(lcdif)) IOMUXC_SetPinMux(IOMUXC_GPIO_B0_00_LCD_CLK, 0); IOMUXC_SetPinMux(IOMUXC_GPIO_B0_01_LCD_ENABLE, 0); IOMUXC_SetPinMux(IOMUXC_GPIO_B0_02_LCD_HSYNC, 0); @@ -189,7 +189,7 @@ static int mimxrt1060_evk_init(struct device *dev) return 0; } -#ifdef CONFIG_ETH_MCUX_0 +#if DT_HAS_NODE(DT_NODELABEL(enet)) static int mimxrt1060_evk_phy_reset(struct device *dev) { /* RESET PHY chip. */ @@ -201,6 +201,6 @@ static int mimxrt1060_evk_phy_reset(struct device *dev) #endif SYS_INIT(mimxrt1060_evk_init, PRE_KERNEL_1, 0); -#ifdef CONFIG_ETH_MCUX_0 +#if DT_HAS_NODE(DT_NODELABEL(enet)) SYS_INIT(mimxrt1060_evk_phy_reset, PRE_KERNEL_2, 0); #endif diff --git a/boards/arm/mimxrt1064_evk/pinmux.c b/boards/arm/mimxrt1064_evk/pinmux.c index 0a8d6dd94f2..6e64ab7e57c 100644 --- a/boards/arm/mimxrt1064_evk/pinmux.c +++ b/boards/arm/mimxrt1064_evk/pinmux.c @@ -8,7 +8,7 @@ #include #include -#ifdef CONFIG_ETH_MCUX_0 +#if DT_HAS_NODE(DT_NODELABEL(enet)) static gpio_pin_config_t enet_gpio_config = { .direction = kGPIO_DigitalOutput, .outputLogic = 0, @@ -23,7 +23,7 @@ static int mimxrt1064_evk_init(struct device *dev) CLOCK_EnableClock(kCLOCK_Iomuxc); CLOCK_EnableClock(kCLOCK_IomuxcSnvs); -#ifndef CONFIG_ETH_MCUX_0 +#if !DT_HAS_NODE(DT_NODELABEL(enet)) /* LED */ IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_09_GPIO1_IO09, 0); @@ -36,7 +36,7 @@ static int mimxrt1064_evk_init(struct device *dev) IOMUXC_SetPinMux(IOMUXC_SNVS_WAKEUP_GPIO5_IO00, 0); #endif -#ifdef CONFIG_UART_MCUX_LPUART_1 +#if DT_HAS_NODE(DT_NODELABEL(lpuart1)) /* LPUART1 TX/RX */ IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_12_LPUART1_TX, 0); IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_13_LPUART1_RX, 0); @@ -52,7 +52,7 @@ static int mimxrt1064_evk_init(struct device *dev) IOMUXC_SW_PAD_CTL_PAD_DSE(6)); #endif -#ifdef CONFIG_DISPLAY_MCUX_ELCDIF +#if DT_HAS_NODE(DT_NODELABEL(lcdif)) IOMUXC_SetPinMux(IOMUXC_GPIO_B0_00_LCD_CLK, 0); IOMUXC_SetPinMux(IOMUXC_GPIO_B0_01_LCD_ENABLE, 0); IOMUXC_SetPinMux(IOMUXC_GPIO_B0_02_LCD_HSYNC, 0); @@ -111,7 +111,7 @@ static int mimxrt1064_evk_init(struct device *dev) GPIO_PinInit(GPIO2, 31, &config); #endif -#ifdef CONFIG_I2C_1 +#if DT_HAS_NODE(DT_NODELABEL(lpi2c1)) /* LPI2C1 SCL, SDA */ IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_00_LPI2C1_SCL, 1); IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_01_LPI2C1_SDA, 1); @@ -131,7 +131,7 @@ static int mimxrt1064_evk_init(struct device *dev) IOMUXC_SW_PAD_CTL_PAD_DSE(6)); #endif -#ifdef CONFIG_ETH_MCUX_0 +#if DT_HAS_NODE(DT_NODELABEL(enet)) IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_09_GPIO1_IO09, 0U); IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_10_GPIO1_IO10, 0U); IOMUXC_SetPinMux(IOMUXC_GPIO_B1_04_ENET_RX_DATA00, 0); @@ -169,11 +169,11 @@ static int mimxrt1064_evk_init(struct device *dev) GPIO_WritePinOutput(GPIO1, 9, 0); #endif -#ifdef CONFIG_FLEXPWM2_PWM3 +#if DT_HAS_NODE(DT_NODELABEL(flexpwm2_pwm3)) IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_09_FLEXPWM2_PWMA03, 0); #endif -#ifdef CONFIG_VIDEO_MCUX_CSI +#if DT_HAS_NODE(DT_NODELABEL(csi)) IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_04_GPIO1_IO04, 0); IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_04_CSI_PIXCLK, 0); IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_05_CSI_MCLK, 0); @@ -192,7 +192,7 @@ static int mimxrt1064_evk_init(struct device *dev) return 0; } -#ifdef CONFIG_ETH_MCUX_0 +#if DT_HAS_NODE(DT_NODELABEL(enet)) static int mimxrt1064_evk_phy_reset(struct device *dev) { /* RESET PHY chip. */ @@ -204,6 +204,6 @@ static int mimxrt1064_evk_phy_reset(struct device *dev) #endif SYS_INIT(mimxrt1064_evk_init, PRE_KERNEL_1, 0); -#ifdef CONFIG_ETH_MCUX_0 +#if DT_HAS_NODE(DT_NODELABEL(enet)) SYS_INIT(mimxrt1064_evk_phy_reset, PRE_KERNEL_2, 0); #endif diff --git a/boards/arm/mm_swiftio/pinmux.c b/boards/arm/mm_swiftio/pinmux.c index d988eaf8343..f5271f5f555 100644 --- a/boards/arm/mm_swiftio/pinmux.c +++ b/boards/arm/mm_swiftio/pinmux.c @@ -9,7 +9,7 @@ #include #include -#ifdef CONFIG_ETH_MCUX_0 +#if DT_HAS_NODE(DT_NODELABEL(enet)) static gpio_pin_config_t enet_gpio_config = { .direction = kGPIO_DigitalOutput, .outputLogic = 0, @@ -17,7 +17,7 @@ static gpio_pin_config_t enet_gpio_config = { }; #endif -#ifdef CONFIG_DISK_ACCESS_USDHC1 +#if DT_HAS_NODE(DT_NODELABEL(usdhc1)) && CONFIG_DISK_ACCESS_USDHC1 /*Drive Strength Field: R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR) *Speed Field: medium(100MHz) @@ -133,7 +133,7 @@ static int mm_swiftio_init(struct device *dev) IOMUXC_SW_PAD_CTL_PAD_DSE(6)); -#ifdef CONFIG_UART_MCUX_LPUART_1 +#if DT_HAS_NODE(DT_NODELABEL(lpuart1)) /* LPUART1 TX/RX */ IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_12_LPUART1_TX, 0); IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_13_LPUART1_RX, 0); @@ -149,7 +149,7 @@ static int mm_swiftio_init(struct device *dev) IOMUXC_SW_PAD_CTL_PAD_DSE(6)); #endif -#ifdef CONFIG_I2C_1 +#if DT_HAS_NODE(DT_NODELABEL(lpi2c1)) IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_00_LPI2C1_SCL, 1); IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_01_LPI2C1_SDA, 1); @@ -168,7 +168,7 @@ static int mm_swiftio_init(struct device *dev) IOMUXC_SW_PAD_CTL_PAD_DSE(6)); #endif -#ifdef CONFIG_I2C_3 +#if DT_HAS_NODE(DT_NODELABEL(lpi2c3)) IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_07_LPI2C3_SCL, 1); IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_06_LPI2C3_SDA, 1); @@ -187,7 +187,7 @@ static int mm_swiftio_init(struct device *dev) IOMUXC_SW_PAD_CTL_PAD_DSE(6)); #endif -#ifdef CONFIG_SPI_3 +#if DT_HAS_NODE(DT_NODELABEL(lpspi3)) /* LPSPI3 SCK, SDO, SDI, PCS0 */ IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_00_LPSPI3_SCK, 0); IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_01_LPSPI3_SDO, 0); @@ -215,7 +215,7 @@ static int mm_swiftio_init(struct device *dev) IOMUXC_SW_PAD_CTL_PAD_DSE(6)); #endif -#ifdef CONFIG_DISK_ACCESS_USDHC1 +#if DT_HAS_NODE(DT_NODELABEL(usdhc1)) && CONFIG_DISK_ACCESS_USDHC1 mm_swiftio_usdhc_pinmux(0, true, 2, 1); imxrt_usdhc_pinmux_cb_register(mm_swiftio_usdhc_pinmux); #endif