diff --git a/dts/arm/st/f0/stm32f091.dtsi b/dts/arm/st/f0/stm32f091.dtsi
index e76d510a75b..66186bef5a3 100644
--- a/dts/arm/st/f0/stm32f091.dtsi
+++ b/dts/arm/st/f0/stm32f091.dtsi
@@ -75,7 +75,6 @@
 			interrupts = <9 0 10 0 10 0 11 0 11 0 11 0
 				      11 0 10 0 10 0 11 0 11 0 11 0>;
 			clocks = <&rcc STM32_CLOCK_BUS_AHB1 0x2>;
-			st,mem2mem;
 			status = "disabled";
 			label = "DMA_2";
 		};
diff --git a/dts/arm/st/f1/stm32f103Xc.dtsi b/dts/arm/st/f1/stm32f103Xc.dtsi
index 151f39966e4..cb5aba6863d 100644
--- a/dts/arm/st/f1/stm32f103Xc.dtsi
+++ b/dts/arm/st/f1/stm32f103Xc.dtsi
@@ -173,7 +173,6 @@
 			reg = <0x40020400 0x400>;
 			clocks = <&rcc STM32_CLOCK_BUS_AHB1 0x2>;
 			interrupts = < 56 0 57 0 58 0 59 0 60 0>;
-			st,mem2mem;
 			status = "disabled";
 			label = "DMA_1";
 		};
diff --git a/dts/arm/st/f1/stm32f107.dtsi b/dts/arm/st/f1/stm32f107.dtsi
index 5437cbdc450..a2c6fd66d83 100644
--- a/dts/arm/st/f1/stm32f107.dtsi
+++ b/dts/arm/st/f1/stm32f107.dtsi
@@ -13,7 +13,6 @@
 			reg = <0x40020400 0x400>;
 			clocks = <&rcc STM32_CLOCK_BUS_AHB1 0x2>;
 			interrupts = <56 0 57 0 58 0 59 0 60 0>;
-			st,mem2mem;
 			status = "disabled";
 			label = "DMA_2";
 		};
diff --git a/dts/arm/st/f3/stm32f373Xc.dtsi b/dts/arm/st/f3/stm32f373Xc.dtsi
index c57c23b4bb2..2a0517774b3 100644
--- a/dts/arm/st/f3/stm32f373Xc.dtsi
+++ b/dts/arm/st/f3/stm32f373Xc.dtsi
@@ -24,7 +24,6 @@
 			reg = <0x40020400 0x400>;
 			clocks = <&rcc STM32_CLOCK_BUS_AHB1 0x2>;
 			interrupts = <56 0 57 0 58 0 59 0 60 0>;
-			st,mem2mem;
 			status = "disabled";
 			label = "DMA_2";
 		};
diff --git a/dts/arm/st/h7/stm32h7.dtsi b/dts/arm/st/h7/stm32h7.dtsi
index a5a13c4ab45..11d54a86c4e 100644
--- a/dts/arm/st/h7/stm32h7.dtsi
+++ b/dts/arm/st/h7/stm32h7.dtsi
@@ -673,6 +673,7 @@
 			interrupts = <11 0>, <12 0>, <13 0>, <14 0>, <15 0>, <16 0>,
 						 <17 0>, <47 0>;
 			clocks = <&rcc STM32_CLOCK_BUS_AHB1 0x00000020>;
+			st,mem2mem;
 			status = "disabled";
 			label = "DMA_1";
 		};
@@ -684,6 +685,7 @@
 			interrupts = <56 0>, <57 0>, <58 0>, <59 0>, <60 0>, <68 0>,
 						<69 0>, <70 0>;
 			clocks = <&rcc STM32_CLOCK_BUS_AHB1 0x00000020>;
+			st,mem2mem;
 			status = "disabled";
 			label = "DMA_2";
 		};
diff --git a/dts/arm/st/l4/stm32l4.dtsi b/dts/arm/st/l4/stm32l4.dtsi
index 0374f440196..b95c2f26696 100644
--- a/dts/arm/st/l4/stm32l4.dtsi
+++ b/dts/arm/st/l4/stm32l4.dtsi
@@ -334,7 +334,6 @@
 			reg = <0x40020000 0x400>;
 			interrupts = <11 0 12 0 13 0 14 0 15 0 16 0 17 0>;
 			clocks = <&rcc STM32_CLOCK_BUS_AHB1 0x1>;
-			st,mem2mem;
 			dma-requests = <7>;
 			status = "disabled";
 			label = "DMA_1";
@@ -346,7 +345,6 @@
 			reg = <0x40020400 0x400>;
 			interrupts = <56 0 57 0 58 0 59 0 60 0 68 0 69 0>;
 			clocks = <&rcc STM32_CLOCK_BUS_AHB1 0x2>;
-			st,mem2mem;
 			dma-requests = <7>;
 			status = "disabled";
 			label = "DMA_2";
diff --git a/dts/arm/st/wb/stm32wb.dtsi b/dts/arm/st/wb/stm32wb.dtsi
index e2c7081fd4c..cdf382e2d10 100644
--- a/dts/arm/st/wb/stm32wb.dtsi
+++ b/dts/arm/st/wb/stm32wb.dtsi
@@ -309,7 +309,6 @@
 			reg = <0x40020000 0x400>;
 			interrupts = <11 0 12 0 13 0 14 0 15 0 16 0 17 0>;
 			clocks = <&rcc STM32_CLOCK_BUS_AHB1 0x1>;
-			st,mem2mem;
 			dma-requests = <7>;
 			dma-offset = <0>;
 			status = "disabled";
@@ -322,7 +321,6 @@
 			reg = <0x40020400 0x400>;
 			interrupts = <55 0 56 0 57 0 58 0 59 0 60 0 61 0>;
 			clocks = <&rcc STM32_CLOCK_BUS_AHB1 0x2>;
-			st,mem2mem;
 			dma-requests = <7>;
 			dma-offset = <7>;
 			status = "disabled";
diff --git a/dts/bindings/dma/st,stm32-dma-v1.yaml b/dts/bindings/dma/st,stm32-dma-v1.yaml
index 62d2b089121..72b85d847d6 100644
--- a/dts/bindings/dma/st,stm32-dma-v1.yaml
+++ b/dts/bindings/dma/st,stm32-dma-v1.yaml
@@ -82,6 +82,7 @@ properties:
 
     st,mem2mem:
       type: boolean
+      required: false
       description: If the DMA controller V1 supports memory to memory transfer
 
     dma-offset: