drivers: regulator: add LDO/DCDC support for Smartbond.
This add regulator driver for Smartbond DA1469X SOC. Driver can control VDD, V14, V18, V18P, V30 rails, full voltage range supported by SOC is covered. For VDD, V14, V18, V18P DCDC can be configured. Special VDD_CLAMP (always on) and VDD_SLEPP are added to allow configuration of VDD in sleep modes. Signed-off-by: Jerzy Kasenberg <jerzy.kasenberg@codecoup.pl>
This commit is contained in:
Jerzy Kasenberg
Fabio Baltieri
parent
1ab08634f2
commit
46bbe052d3
@ -6,6 +6,7 @@ zephyr_library()
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zephyr_library_sources(regulator_common.c)
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zephyr_library_sources_ifdef(CONFIG_REGULATOR_AXP192 regulator_axp192.c)
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zephyr_library_sources_ifdef(CONFIG_REGULATOR_ADP5360 regulator_adp5360.c)
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zephyr_library_sources_ifdef(CONFIG_REGULATOR_DA1469X regulator_da1469x.c)
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zephyr_library_sources_ifdef(CONFIG_REGULATOR_FAKE regulator_fake.c)
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zephyr_library_sources_ifdef(CONFIG_REGULATOR_FIXED regulator_fixed.c)
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zephyr_library_sources_ifdef(CONFIG_REGULATOR_GPIO regulator_gpio.c)
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@ -28,6 +28,7 @@ source "subsys/logging/Kconfig.template.log_config"
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source "drivers/regulator/Kconfig.axp192"
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source "drivers/regulator/Kconfig.adp5360"
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source "drivers/regulator/Kconfig.da1469x"
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source "drivers/regulator/Kconfig.fake"
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source "drivers/regulator/Kconfig.fixed"
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source "drivers/regulator/Kconfig.gpio"
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16
drivers/regulator/Kconfig.da1469x
Normal file
16
drivers/regulator/Kconfig.da1469x
Normal file
@ -0,0 +1,16 @@
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# Copyright 2023 Renesas Electronics Corporation
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# SPDX-License-Identifier: Apache-2.0
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config REGULATOR_DA1469X
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bool "DA1469X regulators driver"
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default y
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depends on DT_HAS_RENESAS_SMARTBOND_REGULATOR_ENABLED
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help
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Enable support for the Smartbond DA1469x regulators.
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config REGULATOR_DA1469X_INIT_PRIORITY
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int "Renesas DA1469x regulators driver init priority"
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default KERNEL_INIT_PRIORITY_DEVICE
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depends on REGULATOR_DA1469X
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help
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Init priority for the Renesas DA1469x regulators driver.
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415
drivers/regulator/regulator_da1469x.c
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415
drivers/regulator/regulator_da1469x.c
Normal file
@ -0,0 +1,415 @@
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/*
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* Copyright 2023 Renesas Electronics Corporation
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* SPDX-License-Identifier: Apache-2.0
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*/
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#define DT_DRV_COMPAT renesas_smartbond_regulator
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#include <stdint.h>
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#include <zephyr/drivers/regulator.h>
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#include <zephyr/logging/log.h>
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#include <zephyr/sys/linear_range.h>
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#include <DA1469xAB.h>
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LOG_MODULE_REGISTER(regulator_da1469x, CONFIG_REGULATOR_LOG_LEVEL);
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#define DCDC_REQUESTED (DCDC_DCDC_VDD_REG_DCDC_VDD_ENABLE_HV_Msk |\
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DCDC_DCDC_VDD_REG_DCDC_VDD_ENABLE_LV_Msk)
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#define DA1469X_LDO_3V0_MODE_VBAT BIT(8)
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#define DA1469X_LDO_3V0_MODE_VBUS BIT(9)
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static const struct linear_range curren_ranges[] = {
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LINEAR_RANGE_INIT(30000, 30000, 0, 31),
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};
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static const struct linear_range vdd_clamp_ranges[] = {
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LINEAR_RANGE_INIT(706000, 0, 15, 15),
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LINEAR_RANGE_INIT(798000, 0, 14, 14),
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LINEAR_RANGE_INIT(828000, 0, 13, 13),
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LINEAR_RANGE_INIT(861000, 0, 11, 11),
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LINEAR_RANGE_INIT(862000, 0, 12, 12),
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LINEAR_RANGE_INIT(889000, 0, 10, 10),
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LINEAR_RANGE_INIT(918000, 0, 9, 9),
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LINEAR_RANGE_INIT(946000, 0, 3, 3),
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LINEAR_RANGE_INIT(952000, 0, 8, 8),
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LINEAR_RANGE_INIT(978000, 0, 2, 2),
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LINEAR_RANGE_INIT(1005000, 0, 1, 1),
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LINEAR_RANGE_INIT(1030000, 0, 7, 7),
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LINEAR_RANGE_INIT(1037000, 0, 0, 0),
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LINEAR_RANGE_INIT(1058000, 0, 6, 6),
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LINEAR_RANGE_INIT(1089000, 0, 5, 5),
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LINEAR_RANGE_INIT(1120000, 0, 4, 4),
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};
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static const struct linear_range vdd_ranges[] = {
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LINEAR_RANGE_INIT(900000, 100000, 0, 3),
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};
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static const struct linear_range vdd_sleep_ranges[] = {
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LINEAR_RANGE_INIT(750000, 50000, 0, 3),
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};
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static const struct linear_range v14_ranges[] = {
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LINEAR_RANGE_INIT(1200000, 50000, 0, 7),
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};
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static const struct linear_range v30_ranges[] = {
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LINEAR_RANGE_INIT(3000000, 300000, 0, 1),
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};
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static const struct linear_range v18_ranges[] = {
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LINEAR_RANGE_INIT(1200000, 600000, 0, 1),
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};
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static const struct linear_range v18p_ranges[] = {
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LINEAR_RANGE_INIT(1800000, 0, 0, 0),
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};
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enum da1469x_rail {
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VDD_CLAMP,
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VDD_SLEEP,
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VDD,
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V14,
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V18,
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V18P,
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V30,
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};
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struct regulator_da1469x_desc {
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const struct linear_range *voltage_ranges;
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const struct linear_range *current_ranges;
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uint8_t voltage_range_count;
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/* Bit from POWER_CTRL_REG that can be used for enabling rail */
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uint32_t enable_mask;
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uint32_t voltage_idx_mask;
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volatile uint32_t *dcdc_register;
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};
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static const struct regulator_da1469x_desc vdd_desc = {
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.voltage_ranges = vdd_ranges,
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.current_ranges = curren_ranges,
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.voltage_range_count = ARRAY_SIZE(vdd_ranges),
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.enable_mask = CRG_TOP_POWER_CTRL_REG_LDO_CORE_ENABLE_Msk,
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.voltage_idx_mask = CRG_TOP_POWER_CTRL_REG_VDD_LEVEL_Msk,
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.dcdc_register = &DCDC->DCDC_VDD_REG,
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};
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static const struct regulator_da1469x_desc vdd_sleep_desc = {
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.voltage_ranges = vdd_sleep_ranges,
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.voltage_range_count = ARRAY_SIZE(vdd_sleep_ranges),
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.enable_mask = CRG_TOP_POWER_CTRL_REG_LDO_CORE_RET_ENABLE_SLEEP_Msk,
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.voltage_idx_mask = CRG_TOP_POWER_CTRL_REG_VDD_SLEEP_LEVEL_Msk,
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};
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static const struct regulator_da1469x_desc vdd_clamp_desc = {
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.voltage_ranges = vdd_clamp_ranges,
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.voltage_range_count = ARRAY_SIZE(vdd_clamp_ranges),
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.enable_mask = 0,
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.voltage_idx_mask = CRG_TOP_POWER_CTRL_REG_VDD_CLAMP_LEVEL_Msk,
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};
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static const struct regulator_da1469x_desc v14_desc = {
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.voltage_ranges = v14_ranges,
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.current_ranges = curren_ranges,
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.voltage_range_count = ARRAY_SIZE(v14_ranges),
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.enable_mask = CRG_TOP_POWER_CTRL_REG_LDO_RADIO_ENABLE_Msk,
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.voltage_idx_mask = CRG_TOP_POWER_CTRL_REG_V14_LEVEL_Msk,
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.dcdc_register = &DCDC->DCDC_V14_REG,
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};
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static const struct regulator_da1469x_desc v18_desc = {
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.voltage_ranges = v18_ranges,
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.current_ranges = curren_ranges,
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.voltage_range_count = ARRAY_SIZE(v18_ranges),
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.enable_mask = CRG_TOP_POWER_CTRL_REG_LDO_1V8_ENABLE_Msk |
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CRG_TOP_POWER_CTRL_REG_LDO_1V8_RET_ENABLE_SLEEP_Msk,
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.voltage_idx_mask = CRG_TOP_POWER_CTRL_REG_V18_LEVEL_Msk,
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.dcdc_register = &DCDC->DCDC_V18_REG,
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};
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static const struct regulator_da1469x_desc v18p_desc = {
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.voltage_ranges = v18p_ranges,
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.current_ranges = curren_ranges,
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.voltage_range_count = ARRAY_SIZE(v18p_ranges),
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.enable_mask = CRG_TOP_POWER_CTRL_REG_LDO_1V8P_ENABLE_Msk |
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CRG_TOP_POWER_CTRL_REG_LDO_1V8P_RET_ENABLE_SLEEP_Msk,
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.voltage_idx_mask = 0,
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.dcdc_register = &DCDC->DCDC_V18P_REG,
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};
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static const struct regulator_da1469x_desc v30_desc = {
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.voltage_ranges = v30_ranges,
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.voltage_range_count = ARRAY_SIZE(v30_ranges),
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.enable_mask = CRG_TOP_POWER_CTRL_REG_LDO_3V0_RET_ENABLE_SLEEP_Msk |
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CRG_TOP_POWER_CTRL_REG_LDO_3V0_MODE_Msk,
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.voltage_idx_mask = CRG_TOP_POWER_CTRL_REG_V30_LEVEL_Msk,
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};
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#define DA1469X_LDO_VDD_CLAMP_RET 0
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#define DA1469X_LDO_VDD_SLEEP_RET 0
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#define DA1469X_LDO_VDD_RET CRG_TOP_POWER_CTRL_REG_LDO_CORE_RET_ENABLE_SLEEP_Msk
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#define DA1469X_LDO_V14_RET 0
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#define DA1469X_LDO_V18_RET CRG_TOP_POWER_CTRL_REG_LDO_1V8_RET_ENABLE_SLEEP_Msk
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#define DA1469X_LDO_V18P_RET CRG_TOP_POWER_CTRL_REG_LDO_1V8P_RET_ENABLE_SLEEP_Msk
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#define DA1469X_LDO_V30_RET CRG_TOP_POWER_CTRL_REG_LDO_3V0_RET_ENABLE_SLEEP_Msk
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struct regulator_da1469x_config {
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struct regulator_common_config common;
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enum da1469x_rail rail;
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const struct regulator_da1469x_desc *desc;
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uint32_t power_bits;
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uint32_t dcdc_bits;
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};
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struct regulator_da1469x_data {
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struct regulator_common_data common;
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};
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static int regulator_da1469x_enable(const struct device *dev)
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{
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const struct regulator_da1469x_config *config = dev->config;
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uint32_t reg_val;
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if (config->desc->enable_mask & config->power_bits) {
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reg_val = CRG_TOP->POWER_CTRL_REG & ~(config->desc->enable_mask);
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reg_val |= config->power_bits & config->desc->enable_mask;
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CRG_TOP->POWER_CTRL_REG |= reg_val;
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}
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if (config->desc->dcdc_register) {
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reg_val = *config->desc->dcdc_register &
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~(DCDC_DCDC_V14_REG_DCDC_V14_ENABLE_HV_Msk |
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DCDC_DCDC_V14_REG_DCDC_V14_ENABLE_LV_Msk);
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reg_val |= config->dcdc_bits;
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*config->desc->dcdc_register = reg_val;
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}
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/*
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* Enable DCDC if:
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* 1. it was not already enabled, and
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* 2. VBAT is above minimal value
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* 3. Just turned on rail requested DCDC
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*/
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if (((DCDC->DCDC_CTRL1_REG & DCDC_DCDC_CTRL1_REG_DCDC_ENABLE_Msk) == 0) &&
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(CRG_TOP->ANA_STATUS_REG & CRG_TOP_ANA_STATUS_REG_COMP_VBAT_HIGH_Msk) &&
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config->dcdc_bits & DCDC_REQUESTED) {
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DCDC->DCDC_CTRL1_REG |= DCDC_DCDC_CTRL1_REG_DCDC_ENABLE_Msk;
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}
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return 0;
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}
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static int regulator_da1469x_disable(const struct device *dev)
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{
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const struct regulator_da1469x_config *config = dev->config;
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uint32_t reg_val;
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if (config->desc->enable_mask & config->power_bits) {
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CRG_TOP->POWER_CTRL_REG &= ~(config->desc->enable_mask &
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config->power_bits);
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}
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if (config->desc->dcdc_register) {
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reg_val = *config->desc->dcdc_register &
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~(DCDC_DCDC_V14_REG_DCDC_V14_ENABLE_HV_Msk |
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DCDC_DCDC_V14_REG_DCDC_V14_ENABLE_LV_Msk);
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*config->desc->dcdc_register = reg_val;
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}
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/* Turn off DCDC if it's no longer requested by any rail */
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if ((DCDC->DCDC_CTRL1_REG & DCDC_DCDC_CTRL1_REG_DCDC_ENABLE_Msk) &&
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(DCDC->DCDC_VDD_REG & DCDC_REQUESTED) == 0 &&
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(DCDC->DCDC_V14_REG & DCDC_REQUESTED) == 0 &&
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(DCDC->DCDC_V18_REG & DCDC_REQUESTED) == 0 &&
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(DCDC->DCDC_V18P_REG & DCDC_REQUESTED) == 0) {
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DCDC->DCDC_CTRL1_REG &= ~DCDC_DCDC_CTRL1_REG_DCDC_ENABLE_Msk;
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}
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return 0;
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}
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static unsigned int regulator_da1469x_count_voltages(const struct device *dev)
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{
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const struct regulator_da1469x_config *config = dev->config;
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return linear_range_group_values_count(config->desc->voltage_ranges,
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config->desc->voltage_range_count);
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}
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static int regulator_da1469x_list_voltage(const struct device *dev,
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unsigned int idx,
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int32_t *volt_uv)
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{
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const struct regulator_da1469x_config *config = dev->config;
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if (config->desc->voltage_ranges) {
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return linear_range_group_get_value(config->desc->voltage_ranges,
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config->desc->voltage_range_count,
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idx, volt_uv);
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}
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return -ENOTSUP;
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}
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static int regulator_da1469x_set_voltage(const struct device *dev, int32_t min_uv,
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int32_t max_uv)
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{
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int ret;
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const struct regulator_da1469x_config *config = dev->config;
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uint16_t idx;
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uint32_t mask;
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ret = linear_range_group_get_win_index(config->desc->voltage_ranges,
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config->desc->voltage_range_count,
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min_uv, max_uv, &idx);
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if (ret == 0) {
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mask = config->desc->voltage_idx_mask;
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/*
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* Mask is 0 for V18.
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* Setting value 1.8V is accepted since range is valid and already checked.
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*/
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if (mask) {
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CRG_TOP->POWER_CTRL_REG = (CRG_TOP->POWER_CTRL_REG & ~mask) |
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FIELD_PREP(mask, idx);
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}
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}
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return ret;
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}
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static int regulator_da1469x_get_voltage(const struct device *dev,
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int32_t *volt_uv)
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{
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const struct regulator_da1469x_config *config = dev->config;
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uint16_t idx;
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if (config->desc->voltage_idx_mask) {
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idx = FIELD_GET(CRG_TOP->POWER_CTRL_REG, config->desc->voltage_idx_mask);
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} else {
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idx = 0;
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}
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return linear_range_group_get_value(config->desc->voltage_ranges,
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config->desc->voltage_range_count, idx, volt_uv);
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}
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static int regulator_da1469x_set_current_limit(const struct device *dev,
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int32_t min_ua, int32_t max_ua)
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{
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const struct regulator_da1469x_config *config = dev->config;
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int ret;
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uint16_t idx;
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uint32_t reg_val;
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if (config->desc->current_ranges == NULL) {
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return -ENOTSUP;
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}
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ret = linear_range_group_get_win_index(config->desc->current_ranges,
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1,
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min_ua, max_ua, &idx);
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if (ret) {
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return ret;
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}
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/* All registers have same bits layout */
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reg_val = *config->desc->dcdc_register & ~(DCDC_DCDC_V14_REG_DCDC_V14_CUR_LIM_MAX_HV_Msk |
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DCDC_DCDC_V14_REG_DCDC_V14_CUR_LIM_MAX_LV_Msk |
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DCDC_DCDC_V14_REG_DCDC_V14_CUR_LIM_MIN_Msk);
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reg_val |= FIELD_PREP(DCDC_DCDC_V14_REG_DCDC_V14_CUR_LIM_MAX_HV_Msk, idx);
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reg_val |= FIELD_PREP(DCDC_DCDC_V14_REG_DCDC_V14_CUR_LIM_MAX_LV_Msk, idx);
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reg_val |= FIELD_PREP(DCDC_DCDC_V14_REG_DCDC_V14_CUR_LIM_MIN_Msk, idx);
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*config->desc->dcdc_register = reg_val;
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return ret;
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}
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static int regulator_da1469x_get_current_limit(const struct device *dev,
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int32_t *curr_ua)
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{
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const struct regulator_da1469x_config *config = dev->config;
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int ret;
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uint16_t idx;
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if (config->desc->current_ranges == NULL) {
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return -ENOTSUP;
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}
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idx = FIELD_GET(*config->desc->dcdc_register,
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DCDC_DCDC_V14_REG_DCDC_V14_CUR_LIM_MAX_HV_Msk);
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ret = linear_range_group_get_value(config->desc->current_ranges, 1, idx, curr_ua);
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return ret;
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}
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static const struct regulator_driver_api regulator_da1469x_api = {
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.enable = regulator_da1469x_enable,
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.disable = regulator_da1469x_disable,
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.count_voltages = regulator_da1469x_count_voltages,
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.list_voltage = regulator_da1469x_list_voltage,
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.set_voltage = regulator_da1469x_set_voltage,
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.get_voltage = regulator_da1469x_get_voltage,
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.set_current_limit = regulator_da1469x_set_current_limit,
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.get_current_limit = regulator_da1469x_get_current_limit,
|
||||
};
|
||||
|
||||
static int regulator_da1469x_init(const struct device *dev)
|
||||
{
|
||||
const struct regulator_da1469x_config *config = dev->config;
|
||||
|
||||
regulator_common_data_init(dev);
|
||||
|
||||
if ((config->rail == V30) &&
|
||||
(config->power_bits & CRG_TOP_POWER_CTRL_REG_LDO_3V0_REF_Msk)) {
|
||||
CRG_TOP->POWER_CTRL_REG |= CRG_TOP_POWER_CTRL_REG_LDO_3V0_REF_Msk;
|
||||
}
|
||||
|
||||
return regulator_common_init(dev, 0);
|
||||
}
|
||||
|
||||
#define REGULATOR_DA1469X_DEFINE(node, id, rail_id) \
|
||||
static struct regulator_da1469x_data data_##id; \
|
||||
\
|
||||
static const struct regulator_da1469x_config config_##id = { \
|
||||
.common = REGULATOR_DT_COMMON_CONFIG_INIT(node), \
|
||||
.desc = &id ## _desc, \
|
||||
.power_bits = \
|
||||
(DT_PROP(node, renesas_regulator_v30_clamp) * \
|
||||
CRG_TOP_POWER_CTRL_REG_CLAMP_3V0_VBAT_ENABLE_Msk) | \
|
||||
(DT_PROP(node, renesas_regulator_v30_vbus) * \
|
||||
DA1469X_LDO_3V0_MODE_VBAT) | \
|
||||
(DT_PROP(node, renesas_regulator_v30_vbat) * \
|
||||
DA1469X_LDO_3V0_MODE_VBUS) | \
|
||||
(DT_PROP(node, renesas_regulator_sleep_ldo) * \
|
||||
(DA1469X_LDO_ ## rail_id ##_RET)) | \
|
||||
(DT_PROP(node, renesas_regulator_v30_ref_bandgap) * \
|
||||
CRG_TOP_POWER_CTRL_REG_LDO_3V0_REF_Msk), \
|
||||
.dcdc_bits = \
|
||||
(DT_PROP(node, renesas_regulator_dcdc_vbat_high) * \
|
||||
DCDC_DCDC_VDD_REG_DCDC_VDD_ENABLE_HV_Msk) | \
|
||||
(DT_PROP(node, renesas_regulator_dcdc_vbat_low) * \
|
||||
DCDC_DCDC_VDD_REG_DCDC_VDD_ENABLE_LV_Msk) \
|
||||
}; \
|
||||
DEVICE_DT_DEFINE(node, regulator_da1469x_init, NULL, &data_##id, \
|
||||
&config_##id, PRE_KERNEL_1, \
|
||||
CONFIG_REGULATOR_DA1469X_INIT_PRIORITY, \
|
||||
®ulator_da1469x_api);
|
||||
|
||||
#define REGULATOR_DA1469X_DEFINE_COND(inst, child, source) \
|
||||
COND_CODE_1(DT_NODE_EXISTS(DT_INST_CHILD(inst, child)), \
|
||||
(REGULATOR_DA1469X_DEFINE( \
|
||||
DT_INST_CHILD(inst, child), child, source)), \
|
||||
())
|
||||
|
||||
#define REGULATOR_DA1469X_DEFINE_ALL(inst) \
|
||||
REGULATOR_DA1469X_DEFINE_COND(inst, vdd_clamp, VDD_CLAMP) \
|
||||
REGULATOR_DA1469X_DEFINE_COND(inst, vdd_sleep, VDD_SLEEP) \
|
||||
REGULATOR_DA1469X_DEFINE_COND(inst, vdd, VDD) \
|
||||
REGULATOR_DA1469X_DEFINE_COND(inst, v14, V14) \
|
||||
REGULATOR_DA1469X_DEFINE_COND(inst, v18, V18) \
|
||||
REGULATOR_DA1469X_DEFINE_COND(inst, v18p, V18P) \
|
||||
REGULATOR_DA1469X_DEFINE_COND(inst, v30, V30) \
|
||||
|
||||
DT_INST_FOREACH_STATUS_OKAY(REGULATOR_DA1469X_DEFINE_ALL)
|
||||
@ -86,6 +86,52 @@
|
||||
clock-src = <&rc32k>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
regulators {
|
||||
compatible = "renesas,smartbond-regulator";
|
||||
vdd: VDD {
|
||||
regulator-init-microvolt = <900000>;
|
||||
regulator-boot-on;
|
||||
renesas,regulator-sleep-ldo;
|
||||
renesas,regulator-dcdc-vbat-high;
|
||||
renesas,regulator-dcdc-vbat-low;
|
||||
};
|
||||
vdd_clamp: VDD_CLAMP {
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
regulator-init-microvolt = <706000>;
|
||||
};
|
||||
vdd_sleep: VDD_SLEEP {
|
||||
regulator-boot-on;
|
||||
regulator-init-microvolt = <750000>;
|
||||
};
|
||||
v14: V14 {
|
||||
regulator-init-microvolt = <1400000>;
|
||||
regulator-boot-on;
|
||||
renesas,regulator-dcdc-vbat-high;
|
||||
renesas,regulator-dcdc-vbat-low;
|
||||
};
|
||||
v18: V18 {
|
||||
regulator-init-microvolt = <1800000>;
|
||||
regulator-boot-on;
|
||||
renesas,regulator-dcdc-vbat-high;
|
||||
};
|
||||
v18p: V18P {
|
||||
regulator-init-microvolt = <1800000>;
|
||||
regulator-boot-on;
|
||||
renesas,regulator-sleep-ldo;
|
||||
renesas,regulator-dcdc-vbat-high;
|
||||
};
|
||||
v30: V30 {
|
||||
regulator-init-microvolt = <3000000>;
|
||||
regulator-boot-on;
|
||||
renesas,regulator-sleep-ldo;
|
||||
renesas,regulator-v30-vbus;
|
||||
renesas,regulator-v30-vbat;
|
||||
renesas,regulator-v30-clamp;
|
||||
renesas,regulator-v30-ref-bandgap;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
soc {
|
||||
|
||||
46
dts/bindings/regulator/renesas,da1469x-regulator.yaml
Normal file
46
dts/bindings/regulator/renesas,da1469x-regulator.yaml
Normal file
@ -0,0 +1,46 @@
|
||||
# Copyright (c), 2023 Renesas Electronics Corporation
|
||||
# SPDX -License-Identifier: Apache-2.0
|
||||
|
||||
description: |
|
||||
Renesas Smartbond(tm) LDO and DCDC regulators
|
||||
|
||||
compatible: "renesas,smartbond-regulator"
|
||||
|
||||
child-binding:
|
||||
include:
|
||||
- name: regulator.yaml
|
||||
property-allowlist:
|
||||
- regulator-always-on
|
||||
- regulator-boot-on
|
||||
- regulator-init-microvolt
|
||||
- regulator-initial-mode
|
||||
- regulator-max-microamp
|
||||
properties:
|
||||
renesas,regulator-v30-ref-bandgap:
|
||||
type: boolean
|
||||
description: |
|
||||
Selects reference source for V30 LDO to Bandgap output.
|
||||
renesas,regulator-v30-clamp:
|
||||
type: boolean
|
||||
description: |
|
||||
Enables clamp that can supply V30 from VBAT.
|
||||
renesas,regulator-v30-vbus:
|
||||
type: boolean
|
||||
description: |
|
||||
Allow V30 to be powered from VBUS.
|
||||
renesas,regulator-v30-vbat:
|
||||
type: boolean
|
||||
description: |
|
||||
Allow V30 to be powered from VBAT.
|
||||
renesas,regulator-dcdc-vbat-high:
|
||||
type: boolean
|
||||
description: |
|
||||
Enable DCDC in high battery voltage mode.
|
||||
renesas,regulator-dcdc-vbat-low:
|
||||
type: boolean
|
||||
description: |
|
||||
Enable DCDC in low battery voltage mode.
|
||||
renesas,regulator-sleep-ldo:
|
||||
type: boolean
|
||||
description: |
|
||||
Enable LDO in sleep mode.
|
||||
Loading…
Reference in New Issue
Block a user