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drivers: uart: Rename nrf5 namings to nrfx

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UART driver renamed to keep the same convention as SPI and TWI drivers.
All substrings: "UART_NRF5" in defines renamed to  "UART_NRFX_UART".

Signed-off-by: Jakub Rzeszutko <jakub.rzeszutko@nordicsemi.no>
This commit is contained in:
Jakub Rzeszutko 2018-06-08 15:29:24 +02:00 committed by Carles Cufí
parent e7252fbbfe
commit 3f99eefe5a
41 changed files with 264 additions and 245 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
arch/arm/soc/nordic_nrf/nrf51/dts.fixup
View File

@ -1,9 +1,9 @@
/* SoC level DTS fixup file */
#define CONFIG_NUM_IRQ_PRIO_BITS ARM_V6M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
#define CONFIG_UART_NRF5_IRQ_PRI NORDIC_NRF_UART_40002000_IRQ_0_PRIORITY
#define CONFIG_UART_NRF5_BAUD_RATE NORDIC_NRF_UART_40002000_CURRENT_SPEED
#define CONFIG_UART_NRF5_NAME NORDIC_NRF_UART_40002000_LABEL
#define CONFIG_UART_0_IRQ_PRI NORDIC_NRF_UART_40002000_IRQ_0_PRIORITY
#define CONFIG_UART_0_BAUD_RATE NORDIC_NRF_UART_40002000_CURRENT_SPEED
#define CONFIG_UART_0_NAME NORDIC_NRF_UART_40002000_LABEL
#define FLASH_DEV_NAME NRF_NRF51_FLASH_CONTROLLER_4001E000_LABEL

6
arch/arm/soc/nordic_nrf/nrf52/dts.fixup
View File

@ -1,9 +1,9 @@
/* SoC level DTS fixup file */
#define CONFIG_NUM_IRQ_PRIO_BITS ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
#define CONFIG_UART_NRF5_IRQ_PRI NORDIC_NRF_UART_40002000_IRQ_0_PRIORITY
#define CONFIG_UART_NRF5_BAUD_RATE NORDIC_NRF_UART_40002000_CURRENT_SPEED
#define CONFIG_UART_NRF5_NAME NORDIC_NRF_UART_40002000_LABEL
#define CONFIG_UART_0_IRQ_PRI NORDIC_NRF_UART_40002000_IRQ_0_PRIORITY
#define CONFIG_UART_0_BAUD_RATE NORDIC_NRF_UART_40002000_CURRENT_SPEED
#define CONFIG_UART_0_NAME NORDIC_NRF_UART_40002000_LABEL
#define FLASH_DEV_NAME NRF_NRF52_FLASH_CONTROLLER_4001E000_LABEL

7
boards/arm/96b_carbon_nrf51/96b_carbon_nrf51_defconfig
View File

@ -6,9 +6,10 @@ CONFIG_BOARD_96B_CARBON_NRF51=y
# enable uart driver
CONFIG_SERIAL=y
CONFIG_UART_NRF5=y
CONFIG_UART_NRF5_GPIO_TX_PIN=29
CONFIG_UART_NRF5_GPIO_RX_PIN=11
CONFIG_UART_NRFX=y
CONFIG_UART_0_NRF_TX_PIN=29
CONFIG_UART_0_NRF_RX_PIN=11
CONFIG_UART_0_NRF_UART=y
# enable console
CONFIG_CONSOLE=y

4
boards/arm/96b_carbon_nrf51/Kconfig.defconfig
View File

@ -9,7 +9,7 @@ if BOARD_96B_CARBON_NRF51
config BOARD
default "96b_carbon_nrf51"
if UART_NRF5
if UART_NRFX
config GPIO
default y
@ -20,6 +20,6 @@ config GPIO_NRF5
config GPIO_NRF5_P0
default y
endif # UART_NRF5
endif # UART_NRFX
endif # BOARD_96B_CARBON_NRF51

3
boards/arm/96b_nitrogen/96b_nitrogen_defconfig
View File

@ -8,7 +8,8 @@ CONFIG_ARM_MPU_NRF52X=y
# enable uart driver
CONFIG_SERIAL=y
CONFIG_UART_NRF5=y
CONFIG_UART_NRFX=y
CONFIG_UART_0_NRF_UART=y
# enable console
CONFIG_CONSOLE=y

12
boards/arm/96b_nitrogen/Kconfig.defconfig
View File

@ -16,20 +16,20 @@ config GPIO_NRF5_P0
endif # GPIO_NRF5
if UART_NRF5
if UART_NRFX
config UART_NRF5_GPIO_TX_PIN
config UART_0_NRF_TX_PIN
default 13
config UART_NRF5_GPIO_RX_PIN
config UART_0_NRF_RX_PIN
default 15
config UART_NRF5_GPIO_RTS_PIN
config UART_0_NRF_RTS_PIN
default 12
config UART_NRF5_GPIO_CTS_PIN
config UART_0_NRF_CTS_PIN
default 14
endif # UART_NRF5
endif # UART_NRFX
endif # BOARD_96B_NITROGEN

8
boards/arm/bbc_microbit/Kconfig.defconfig
View File

@ -16,15 +16,15 @@ config GPIO_NRF5_P0
endif # GPIO_NRF5
if UART_NRF5
if UART_NRFX
config UART_NRF5_GPIO_TX_PIN
config UART_0_NRF_TX_PIN
default 24
config UART_NRF5_GPIO_RX_PIN
config UART_0_NRF_RX_PIN
default 25
endif # UART_NRF5
endif # UART_NRFX
if I2C

3
boards/arm/bbc_microbit/bbc_microbit_defconfig
View File

@ -10,7 +10,8 @@ CONFIG_CLOCK_CONTROL_NRF5_K32SRC_250PPM=y
# enable uart driver
CONFIG_SERIAL=y
CONFIG_UART_NRF5=y
CONFIG_UART_NRFX=y
CONFIG_UART_0_NRF_UART=y
# enable console
CONFIG_CONSOLE=y

12
boards/arm/curie_ble/Kconfig.defconfig
View File

@ -9,7 +9,7 @@ if BOARD_CURIE_BLE
config BOARD
default "curie_ble"
if UART_NRF5
if UART_NRFX
config GPIO
default y
@ -20,18 +20,18 @@ config GPIO_NRF5
config GPIO_NRF5_P0
default y
config UART_NRF5_GPIO_TX_PIN
config UART_0_NRF_TX_PIN
default 9
config UART_NRF5_GPIO_RX_PIN
config UART_0_NRF_RX_PIN
default 11
config UART_NRF5_GPIO_RTS_PIN
config UART_0_NRF_RTS_PIN
default 12
config UART_NRF5_GPIO_CTS_PIN
config UART_0_NRF_CTS_PIN
default 10
endif # UART_NRF5
endif # UART_NRFX
endif # BOARD_CURIE_BLE

3
boards/arm/curie_ble/curie_ble_defconfig
View File

@ -6,7 +6,8 @@ CONFIG_BOARD_CURIE_BLE=y
# enable uart driver
CONFIG_SERIAL=y
CONFIG_UART_NRF5=y
CONFIG_UART_NRFX=y
CONFIG_UART_0_NRF_UART=y
# bluetooth
CONFIG_BT=y

12
boards/arm/nrf51_ble400/Kconfig.defconfig
View File

@ -16,20 +16,20 @@ config GPIO_NRF5_P0
endif # GPIO_NRF5
if UART_NRF5
if UART_NRFX
config UART_NRF5_GPIO_TX_PIN
config UART_0_NRF_TX_PIN
default 9
config UART_NRF5_GPIO_RX_PIN
config UART_0_NRF_RX_PIN
default 11
config UART_NRF5_GPIO_RTS_PIN
config UART_0_NRF_RTS_PIN
default 8
config UART_NRF5_GPIO_CTS_PIN
config UART_0_NRF_CTS_PIN
default 10
endif # UART_NRF5
endif # UART_NRFX
endif # BOARD_NRF51_BLE400

3
boards/arm/nrf51_ble400/nrf51_ble400_defconfig
View File

@ -6,7 +6,8 @@ CONFIG_BOARD_NRF51_BLE400=y
# enable uart driver
CONFIG_SERIAL=y
CONFIG_UART_NRF5=y
CONFIG_UART_NRFX=y
CONFIG_UART_0_NRF_UART=y
# enable console
CONFIG_CONSOLE=y

12
boards/arm/nrf51_blenano/Kconfig.defconfig
View File

@ -16,20 +16,20 @@ config GPIO_NRF5_P0
endif # GPIO_NRF5
if UART_NRF5
if UART_NRFX
config UART_NRF5_GPIO_TX_PIN
config UART_0_NRF_TX_PIN
default 9
config UART_NRF5_GPIO_RX_PIN
config UART_0_NRF_RX_PIN
default 11
config UART_NRF5_GPIO_RTS_PIN
config UART_0_NRF_RTS_PIN
default 8
config UART_NRF5_GPIO_CTS_PIN
config UART_0_NRF_CTS_PIN
default 10
endif # UART_NRF5
endif # UART_NRFX
endif # BOARD_NRF51_BLENANO

3
boards/arm/nrf51_blenano/nrf51_blenano_defconfig
View File

@ -6,7 +6,8 @@ CONFIG_BOARD_NRF51_BLENANO=y
# enable uart driver
CONFIG_SERIAL=y
CONFIG_UART_NRF5=y
CONFIG_UART_NRFX=y
CONFIG_UART_0_NRF_UART=y
# enable console
CONFIG_CONSOLE=y

12
boards/arm/nrf51_pca10028/Kconfig.defconfig
View File

@ -16,20 +16,20 @@ config GPIO_NRF5_P0
endif # GPIO_NRF5
if UART_NRF5
if UART_NRFX
config UART_NRF5_GPIO_TX_PIN
config UART_0_NRF_TX_PIN
default 9
config UART_NRF5_GPIO_RX_PIN
config UART_0_NRF_RX_PIN
default 11
config UART_NRF5_GPIO_RTS_PIN
config UART_0_NRF_RTS_PIN
default 8
config UART_NRF5_GPIO_CTS_PIN
config UART_0_NRF_CTS_PIN
default 10
endif # UART_NRF5
endif # UART_NRFX
endif # BOARD_NRF51_PCA10028

3
boards/arm/nrf51_pca10028/nrf51_pca10028_defconfig
View File

@ -6,7 +6,8 @@ CONFIG_BOARD_NRF51_PCA10028=y
# enable uart driver
CONFIG_SERIAL=y
CONFIG_UART_NRF5=y
CONFIG_UART_NRFX=y
CONFIG_UART_0_NRF_UART=y
# enable console
CONFIG_CONSOLE=y

12
boards/arm/nrf51_vbluno51/Kconfig.defconfig
View File

@ -16,21 +16,21 @@ config GPIO_NRF5_P0
endif # GPIO_NRF5
if UART_NRF5
if UART_NRFX
config UART_NRF5_GPIO_TX_PIN
config UART_0_NRF_TX_PIN
default 10
config UART_NRF5_GPIO_RX_PIN
config UART_0_NRF_RX_PIN
default 11
config UART_NRF5_GPIO_RTS_PIN
config UART_0_NRF_RTS_PIN
default 12
config UART_NRF5_GPIO_CTS_PIN
config UART_0_NRF_CTS_PIN
default 13
endif # UART_NRF5
endif # UART_NRFX
if I2C

3
boards/arm/nrf51_vbluno51/nrf51_vbluno51_defconfig
View File

@ -6,7 +6,8 @@ CONFIG_BOARD_NRF51_VBLUNO51=y
# enable uart driver
CONFIG_SERIAL=y
CONFIG_UART_NRF5=y
CONFIG_UART_NRFX=y
CONFIG_UART_0_NRF_UART=y
# enable console
CONFIG_CONSOLE=y

12
boards/arm/nrf52840_pca10056/Kconfig.defconfig
View File

@ -16,21 +16,21 @@ config GPIO_NRF5_P0
endif # GPIO_NRF5
if UART_NRF5
if UART_NRFX
config UART_NRF5_GPIO_TX_PIN
config UART_0_NRF_TX_PIN
default 6
config UART_NRF5_GPIO_RX_PIN
config UART_0_NRF_RX_PIN
default 8
config UART_NRF5_GPIO_RTS_PIN
config UART_0_NRF_RTS_PIN
default 5
config UART_NRF5_GPIO_CTS_PIN
config UART_0_NRF_CTS_PIN
default 7
endif # UART_NRF5
endif # UART_NRFX
if USB

3
boards/arm/nrf52840_pca10056/nrf52840_pca10056_defconfig
View File

@ -9,7 +9,8 @@ CONFIG_ARM_MPU_NRF52X=y
# enable uart driver
CONFIG_SERIAL=y
CONFIG_UART_NRF5=y
CONFIG_UART_NRFX=y
CONFIG_UART_0_NRF_UART=y
# enable console
CONFIG_CONSOLE=y

12
boards/arm/nrf52_blenano2/Kconfig.defconfig
View File

@ -16,21 +16,21 @@ config GPIO_NRF5_P0
endif # GPIO_NRF5
if UART_NRF5
if UART_NRFX
config UART_NRF5_GPIO_TX_PIN
config UART_0_NRF_TX_PIN
default 29
config UART_NRF5_GPIO_RX_PIN
config UART_0_NRF_RX_PIN
default 30
config UART_NRF5_GPIO_RTS_PIN
config UART_0_NRF_RTS_PIN
default 2
config UART_NRF5_GPIO_CTS_PIN
config UART_0_NRF_CTS_PIN
default 28
endif # UART_NRF5
endif # UART_NRFX
if I2C

3
boards/arm/nrf52_blenano2/nrf52_blenano2_defconfig
View File

@ -9,7 +9,8 @@ CONFIG_ARM_MPU_NRF52X=y
# enable uart driver
CONFIG_SERIAL=y
CONFIG_UART_NRF5=y
CONFIG_UART_NRFX=y
CONFIG_UART_0_NRF_UART=y
# enable console
CONFIG_CONSOLE=y

12
boards/arm/nrf52_pca10040/Kconfig.defconfig
View File

@ -16,20 +16,20 @@ config GPIO_NRF5_P0
endif # GPIO_NRF5
if UART_NRF5
if UART_NRFX
config UART_NRF5_GPIO_TX_PIN
config UART_0_NRF_TX_PIN
default 6
config UART_NRF5_GPIO_RX_PIN
config UART_0_NRF_RX_PIN
default 8
config UART_NRF5_GPIO_RTS_PIN
config UART_0_NRF_RTS_PIN
default 5
config UART_NRF5_GPIO_CTS_PIN
config UART_0_NRF_CTS_PIN
default 7
endif # UART_NRF5
endif # UART_NRFX
endif # BOARD_NRF52_PCA10040

3
boards/arm/nrf52_pca10040/nrf52_pca10040_defconfig
View File

@ -9,7 +9,8 @@ CONFIG_ARM_MPU_NRF52X=y
# enable uart driver
CONFIG_SERIAL=y
CONFIG_UART_NRF5=y
CONFIG_UART_NRFX=y
CONFIG_UART_0_NRF_UART=y
# enable console
CONFIG_CONSOLE=y

8
boards/arm/nrf52_pca20020/Kconfig.defconfig
View File

@ -16,15 +16,15 @@ config GPIO_NRF5_P0
endif # GPIO_NRF5
if UART_NRF5
if UART_NRFX
config UART_NRF5_GPIO_TX_PIN
config UART_0_NRF_TX_PIN
default 3
config UART_NRF5_GPIO_RX_PIN
config UART_0_NRF_RX_PIN
default 2
endif # UART_NRF5
endif # UART_NRFX
config I2C
def_bool y

3
boards/arm/nrf52_pca20020/nrf52_pca20020_defconfig
View File

@ -9,7 +9,8 @@ CONFIG_ARM_MPU_NRF52X=y
# enable uart driver
CONFIG_SERIAL=y
CONFIG_UART_NRF5=y
CONFIG_UART_NRFX=y
CONFIG_UART_0_NRF_UART=y
# enable console
CONFIG_CONSOLE=y

8
boards/arm/nrf52_sparkfun/Kconfig.defconfig
View File

@ -17,14 +17,14 @@ config GPIO_NRF5_P0
endif # GPIO_NRF5
if UART_NRF5
if UART_NRFX
config UART_NRF5_GPIO_TX_PIN
config UART_0_NRF_TX_PIN
default 27
config UART_NRF5_GPIO_RX_PIN
config UART_0_NRF_RX_PIN
default 26
endif # UART_NRF5
endif # UART_NRFX
endif # BOARD_NRF52_SPARKFUN

3
boards/arm/nrf52_sparkfun/nrf52_sparkfun_defconfig
View File

@ -9,7 +9,8 @@ CONFIG_ARM_MPU_NRF52X=y
# enable uart driver
CONFIG_SERIAL=y
CONFIG_UART_NRF5=y
CONFIG_UART_NRFX=y
CONFIG_UART_0_NRF_UART=y
# enable console
CONFIG_CONSOLE=y

12
boards/arm/nrf52_vbluno52/Kconfig.defconfig
View File

@ -16,21 +16,21 @@ config GPIO_NRF5_P0
endif # GPIO_NRF5
if UART_NRF5
if UART_NRFX
config UART_NRF5_GPIO_TX_PIN
config UART_0_NRF_TX_PIN
default 6
config UART_NRF5_GPIO_RX_PIN
config UART_0_NRF_RX_PIN
default 8
config UART_NRF5_GPIO_RTS_PIN
config UART_0_NRF_RTS_PIN
default 5
config UART_NRF5_GPIO_CTS_PIN
config UART_0_NRF_CTS_PIN
default 7
endif # UART_NRF5
endif # UART_NRFX
if I2C

3
boards/arm/nrf52_vbluno52/nrf52_vbluno52_defconfig
View File

@ -9,7 +9,8 @@ CONFIG_ARM_MPU_NRF52X=y
# enable uart driver
CONFIG_SERIAL=y
CONFIG_UART_NRF5=y
CONFIG_UART_NRFX=y
CONFIG_UART_0_NRF_UART=y
# enable console
CONFIG_CONSOLE=y

12
boards/arm/quark_se_c1000_ble/Kconfig.defconfig
View File

@ -9,7 +9,7 @@ if BOARD_QUARK_SE_C1000_BLE
config BOARD
default "quark_se_c1000_ble"
if UART_NRF5
if UART_NRFX
config GPIO
default y
@ -20,18 +20,18 @@ config GPIO_NRF5
config GPIO_NRF5_P0
default y
config UART_NRF5_GPIO_TX_PIN
config UART_0_NRF_TX_PIN
default 9
config UART_NRF5_GPIO_RX_PIN
config UART_0_NRF_RX_PIN
default 11
config UART_NRF5_GPIO_RTS_PIN
config UART_0_NRF_RTS_PIN
default 8
config UART_NRF5_GPIO_CTS_PIN
config UART_0_NRF_CTS_PIN
default 10
endif # UART_NRF5
endif # UART_NRFX
endif # BOARD_QUARK_SE_C1000_BLE

3
boards/arm/quark_se_c1000_ble/quark_se_c1000_ble_defconfig
View File

@ -6,7 +6,8 @@ CONFIG_BOARD_QUARK_SE_C1000_BLE=y
# enable uart driver
CONFIG_SERIAL=y
CONFIG_UART_NRF5=y
CONFIG_UART_NRFX=y
CONFIG_UART_0_NRF_UART=y
# bluetooth
CONFIG_BT=y

2
drivers/serial/CMakeLists.txt
View File

@ -11,7 +11,7 @@ zephyr_library_sources_if_kconfig(uart_mcux.c)
zephyr_library_sources_if_kconfig(uart_mcux_lpuart.c)
zephyr_library_sources_if_kconfig(uart_mcux_lpsci.c)
zephyr_library_sources_if_kconfig(uart_msp432p4xx.c)
zephyr_library_sources_if_kconfig(uart_nrf5.c)
zephyr_library_sources_ifdef(CONFIG_NRF_UART_PERIPHERAL uart_nrfx_uart.c)
zephyr_library_sources_if_kconfig(uart_ns16550.c)
zephyr_library_sources_if_kconfig(uart_nsim.c)
zephyr_library_sources_if_kconfig(uart_qmsi.c)

2
drivers/serial/Kconfig
View File

@ -87,7 +87,7 @@ source "drivers/serial/Kconfig.qmsi"
source "drivers/serial/Kconfig.stm32"
source "drivers/serial/Kconfig.nrf5"
source "drivers/serial/Kconfig.nrfx"
source "drivers/serial/Kconfig.altera_jtag"

62
drivers/serial/Kconfig.nrf5
View File

@ -1,62 +0,0 @@
# Kconfig.nrf5 - NRF5 UART configuration
#
# Copyright (c) 2016 - 2018, Nordic Semiconductor ASA
#
# SPDX-License-Identifier: Apache-2.0
#
menuconfig UART_NRF5
bool "Nordic Semiconductor NRF5 family processor UART driver"
select SERIAL_HAS_DRIVER
select SERIAL_SUPPORT_INTERRUPT
select GPIO
depends on SOC_FAMILY_NRF
help
This option enables the UART driver for Nordic Semiconductor nRF5
family processors. Note that there is only one
UART controller on nRF5 ICs.
if UART_NRF5
config UART_NRF5_PARITY_BIT
bool "Enable parity bit"
help
Enable parity bit.
config UART_NRF5_FLOW_CONTROL
bool "Enable flow control"
help
Enable flow control. If selected, additionally two pins, RTS and CTS
have to be configured.
config UART_NRF5_GPIO_TX_PIN
int "TX Pin Number"
range 0 47 if SOC_NRF52840_QIAA
range 0 31
help
The GPIO pin to use for TX.
config UART_NRF5_GPIO_RX_PIN
int "RX Pin Number"
range 0 47 if SOC_NRF52840_QIAA
range 0 31
help
The GPIO pin to use for RX.
config UART_NRF5_GPIO_RTS_PIN
int "RTS Pin Number"
range 0 47 if SOC_NRF52840_QIAA
range 0 31
depends on UART_NRF5_FLOW_CONTROL
help
The GPIO pin to use for RTS.
config UART_NRF5_GPIO_CTS_PIN
int "CTS Pin Number"
range 0 47 if SOC_NRF52840_QIAA
range 0 31
depends on UART_NRF5_FLOW_CONTROL
help
The GPIO pin to use for CTS.
endif # UART_NRF5

80
drivers/serial/Kconfig.nrfx Normal file
View File

@ -0,0 +1,80 @@
# Kconfig.nrfx - nrfx UART configuration
#
# Copyright (c) 2016 - 2018, Nordic Semiconductor ASA
#
# SPDX-License-Identifier: Apache-2.0
#
menuconfig UART_NRFX
bool "nRF UART nrfx drivers"
select SERIAL_HAS_DRIVER
select SERIAL_SUPPORT_INTERRUPT
select GPIO
depends on SOC_FAMILY_NRF
help
Enable support for nrfx UART drivers for nRF MCU series.
Peripherals with the same instance ID cannot be used together,
e.g. UART_0 and UARTE_0.
if UART_NRFX
choice
prompt "UART Port 0 Driver type"
config UART_0_NRF_UART
bool "nRF UART 0"
depends on ((SOC_SERIES_NRF52X || SOC_SERIES_NRF51X) && (!SOC_NRF52810))
select NRF_UART_PERIPHERAL
help
Enable nRF UART without EasyDMA on port 0.
endchoice
if UART_0_NRF_UART
config UART_0_NRF_PARITY_BIT
bool "Enable parity bit"
help
Enable parity bit.
config UART_0_NRF_FLOW_CONTROL
bool "Enable flow control"
help
Enable flow control. If selected, additionally two pins, RTS and CTS
have to be configured.
config UART_0_NRF_TX_PIN
int "TX Pin Number"
range 0 47 if SOC_NRF52840_QIAA
range 0 31
help
The GPIO pin to use for TX.
config UART_0_NRF_RX_PIN
int "RX Pin Number"
range 0 47 if SOC_NRF52840_QIAA
range 0 31
help
The GPIO pin to use for RX.
config UART_0_NRF_CTS_PIN
int "CTS Pin Number"
range 0 47 if SOC_NRF52840_QIAA
range 0 31
depends on UART_0_NRF_FLOW_CONTROL
help
The GPIO pin to use for CTS.
config UART_0_NRF_RTS_PIN
int "RTS Pin Number"
range 0 47 if SOC_NRF52840_QIAA
range 0 31
depends on UART_0_NRF_FLOW_CONTROL
help
The GPIO pin to use for RTS.
endif # UART_0_NRF_UART
config NRF_UART_PERIPHERAL
bool
endif # UART_NRFX

123
drivers/serial/uart_nrf5.c → drivers/serial/uart_nrfx_uart.c
View File

@ -32,7 +32,6 @@ static int baudrate_set(struct device *dev, u32_t baudrate)
{
nrf_uart_baudrate_t nrf_baudrate; /* calculated baudrate divisor */
/* Use the common nRF5 macros */
switch (baudrate) {
case 300:
/* value not supported by Nordic HAL */
@ -108,7 +107,7 @@ static int baudrate_set(struct device *dev, u32_t baudrate)
* @return 0 if a character arrived, -1 if the input buffer if empty.
*/
static int uart_nrf5_poll_in(struct device *dev, unsigned char *c)
static int uart_nrfx_poll_in(struct device *dev, unsigned char *c)
{
if (!nrf_uart_event_check(NRF_UART0, NRF_UART_EVENT_RXDRDY)) {
return -1;
@ -131,7 +130,7 @@ static int uart_nrf5_poll_in(struct device *dev, unsigned char *c)
*
* @return Sent character
*/
static unsigned char uart_nrf5_poll_out(struct device *dev,
static unsigned char uart_nrfx_poll_out(struct device *dev,
unsigned char c)
{
/* The UART API dictates that poll_out should wait for the transmitter
@ -159,7 +158,7 @@ static unsigned char uart_nrf5_poll_out(struct device *dev,
}
/** Console I/O function */
static int uart_nrf5_err_check(struct device *dev)
static int uart_nrfx_err_check(struct device *dev)
{
u32_t error = 0;
@ -175,7 +174,7 @@ static int uart_nrf5_err_check(struct device *dev)
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
/** Interrupt driven FIFO fill function */
static int uart_nrf5_fifo_fill(struct device *dev,
static int uart_nrfx_fifo_fill(struct device *dev,
const u8_t *tx_data,
int len)
{
@ -194,7 +193,7 @@ static int uart_nrf5_fifo_fill(struct device *dev,
}
/** Interrupt driven FIFO read function */
static int uart_nrf5_fifo_read(struct device *dev,
static int uart_nrfx_fifo_read(struct device *dev,
u8_t *rx_data,
const int size)
{
@ -213,55 +212,55 @@ static int uart_nrf5_fifo_read(struct device *dev,
}
/** Interrupt driven transfer enabling function */
static void uart_nrf5_irq_tx_enable(struct device *dev)
static void uart_nrfx_irq_tx_enable(struct device *dev)
{
nrf_uart_int_enable(NRF_UART0, NRF_UART_INT_MASK_TXDRDY);
}
/** Interrupt driven transfer disabling function */
static void uart_nrf5_irq_tx_disable(struct device *dev)
static void uart_nrfx_irq_tx_disable(struct device *dev)
{
nrf_uart_int_disable(NRF_UART0, NRF_UART_INT_MASK_TXDRDY);
}
/** Interrupt driven transfer ready function */
static int uart_nrf5_irq_tx_ready(struct device *dev)
static int uart_nrfx_irq_tx_ready(struct device *dev)
{
return nrf_uart_event_check(NRF_UART0, NRF_UART_EVENT_TXDRDY);
}
/** Interrupt driven receiver enabling function */
static void uart_nrf5_irq_rx_enable(struct device *dev)
static void uart_nrfx_irq_rx_enable(struct device *dev)
{
nrf_uart_int_enable(NRF_UART0, NRF_UART_INT_MASK_RXDRDY);
}
/** Interrupt driven receiver disabling function */
static void uart_nrf5_irq_rx_disable(struct device *dev)
static void uart_nrfx_irq_rx_disable(struct device *dev)
{
nrf_uart_int_disable(NRF_UART0, NRF_UART_INT_MASK_RXDRDY);
}
/** Interrupt driven transfer empty function */
static int uart_nrf5_irq_tx_complete(struct device *dev)
static int uart_nrfx_irq_tx_complete(struct device *dev)
{
return !nrf_uart_event_check(NRF_UART0, NRF_UART_EVENT_TXDRDY);
}
/** Interrupt driven receiver ready function */
static int uart_nrf5_irq_rx_ready(struct device *dev)
static int uart_nrfx_irq_rx_ready(struct device *dev)
{
return nrf_uart_event_check(NRF_UART0, NRF_UART_EVENT_RXDRDY);
}
/** Interrupt driven error enabling function */
static void uart_nrf5_irq_err_enable(struct device *dev)
static void uart_nrfx_irq_err_enable(struct device *dev)
{
nrf_uart_int_enable(NRF_UART0, NRF_UART_INT_MASK_ERROR);
}
/** Interrupt driven error disabling function */
static void uart_nrf5_irq_err_disable(struct device *dev)
static void uart_nrfx_irq_err_disable(struct device *dev)
{
nrf_uart_int_disable(NRF_UART0, NRF_UART_INT_MASK_ERROR);
}
@ -269,26 +268,26 @@ static void uart_nrf5_irq_err_disable(struct device *dev)
/** Interrupt driven pending status function */
static int uart_nrf5_irq_is_pending(struct device *dev)
static int uart_nrfx_irq_is_pending(struct device *dev)
{
return ((nrf_uart_int_enable_check(NRF_UART0,
NRF_UART_INT_MASK_TXDRDY) &&
uart_nrf5_irq_tx_ready(dev))
uart_nrfx_irq_tx_ready(dev))
||
(nrf_uart_int_enable_check(NRF_UART0,
NRF_UART_INT_MASK_RXDRDY) &&
uart_nrf5_irq_rx_ready(dev)));
uart_nrfx_irq_rx_ready(dev)));
}
/** Interrupt driven interrupt update function */
static int uart_nrf5_irq_update(struct device *dev)
static int uart_nrfx_irq_update(struct device *dev)
{
return 1;
}
/** Set the callback function */
static void uart_nrf5_irq_callback_set(struct device *dev,
uart_irq_callback_t cb)
static void uart_nrfx_irq_callback_set(struct device *dev,
uart_irq_callback_t cb)
{
(void)dev;
m_irq_callback = cb;
@ -303,7 +302,7 @@ static void uart_nrf5_irq_callback_set(struct device *dev,
*
* @return N/A
*/
static void uart_nrf5_isr(void *arg)
static void uart_nrfx_isr(void *arg)
{
struct device *dev = arg;
@ -325,7 +324,7 @@ DEVICE_DECLARE(uart_nrfx_uart0);
*
* @return 0 on success
*/
static int uart_nrf5_init(struct device *dev)
static int uart_nrfx_init(struct device *dev)
{
struct device *gpio_dev;
int err;
@ -337,44 +336,30 @@ static int uart_nrf5_init(struct device *dev)
CONFIG_GPIO_NRF5_P0_DEV_NAME);
(void) gpio_pin_configure(gpio_dev,
CONFIG_UART_NRF5_GPIO_TX_PIN,
CONFIG_UART_0_NRF_TX_PIN,
(GPIO_DIR_OUT | GPIO_PUD_PULL_UP));
(void) gpio_pin_configure(gpio_dev,
CONFIG_UART_NRF5_GPIO_RX_PIN,
CONFIG_UART_0_NRF_RX_PIN,
(GPIO_DIR_IN));
nrf_uart_txrx_pins_set(NRF_UART0,
CONFIG_UART_NRF5_GPIO_TX_PIN,
CONFIG_UART_NRF5_GPIO_RX_PIN);
#ifdef CONFIG_UART_NRF5_FLOW_CONTROL
(void) gpio_pin_configure(gpio_dev,
CONFIG_UART_NRF5_GPIO_RTS_PIN,
(GPIO_DIR_OUT | GPIO_PUD_PULL_UP));
(void) gpio_pin_configure(gpio_dev,
CONFIG_UART_NRF5_GPIO_CTS_PIN,
(GPIO_DIR_IN));
nrf_uart_hwfc_pins_set(NRF_UART0,
CONFIG_UART_NRF5_GPIO_RTS_PIN,
CONFIG_UART_NRF5_GPIO_CTS_PIN);
#endif /* CONFIG_UART_NRF5_FLOW_CONTROL */
CONFIG_UART_0_NRF_TX_PIN,
CONFIG_UART_0_NRF_RX_PIN);
nrf_uart_configure(NRF_UART0,
#ifdef CONFIG_UART_NRF5_PARITY_BIT
#ifdef CONFIG_UART_0_NRF_PARITY_BIT
NRF_UART_PARITY_INCLUDED,
#else
NRF_UART_PARITY_EXCLUDED,
#endif /* CONFIG_UART_NRF5_PARITY_BIT */
#ifdef CONFIG_UART_NRF5_FLOW_CONTROL
#endif /* CONFIG_UART_0_NRF_PARITY_BIT */
#ifdef CONFIG_UART_0_NRF_FLOW_CONTROL
NRF_UART_HWFC_ENABLED);
#else
NRF_UART_HWFC_DISABLED);
#endif /* CONFIG_UART_NRF5_FLOW_CONTROL */
#endif /* CONFIG_UART_0_NRF_PARITY_BIT */
/* Set baud rate */
err = baudrate_set(dev, CONFIG_UART_NRF5_BAUD_RATE);
err = baudrate_set(dev, CONFIG_UART_0_BAUD_RATE);
if (err) {
return err;
}
@ -391,8 +376,8 @@ static int uart_nrf5_init(struct device *dev)
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
IRQ_CONNECT(NRFX_IRQ_NUMBER_GET(NRF_UART0),
CONFIG_UART_NRF5_IRQ_PRI,
uart_nrf5_isr,
CONFIG_UART_0_IRQ_PRI,
uart_nrfx_isr,
DEVICE_GET(uart_nrfx_uart0),
0);
irq_enable(NRFX_IRQ_NUMBER_GET(NRF_UART0));
@ -401,34 +386,34 @@ static int uart_nrf5_init(struct device *dev)
return 0;
}
static const struct uart_driver_api uart_nrfx_driver_api = {
.poll_in = uart_nrf5_poll_in, /** Console I/O function */
.poll_out = uart_nrf5_poll_out, /** Console I/O function */
.err_check = uart_nrf5_err_check, /** Console I/O function */
static const struct uart_driver_api uart_nrfx_uart_driver_api = {
.poll_in = uart_nrfx_poll_in, /** Console I/O function */
.poll_out = uart_nrfx_poll_out, /** Console I/O function */
.err_check = uart_nrfx_err_check, /** Console I/O function */
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
.fifo_fill = uart_nrf5_fifo_fill, /** IRQ FIFO fill function */
.fifo_read = uart_nrf5_fifo_read, /** IRQ FIFO read function */
.irq_tx_enable = uart_nrf5_irq_tx_enable, /** IRQ transfer enabling function */
.irq_tx_disable = uart_nrf5_irq_tx_disable, /** IRQ transfer disabling function */
.irq_tx_ready = uart_nrf5_irq_tx_ready, /** IRQ transfer ready function */
.irq_rx_enable = uart_nrf5_irq_rx_enable, /** IRQ receiver enabling function */
.irq_rx_disable = uart_nrf5_irq_rx_disable, /** IRQ receiver disabling function */
.irq_tx_complete = uart_nrf5_irq_tx_complete, /** IRQ transfer complete function */
.irq_rx_ready = uart_nrf5_irq_rx_ready, /** IRQ receiver ready function */
.irq_err_enable = uart_nrf5_irq_err_enable, /** IRQ error enabling function */
.irq_err_disable = uart_nrf5_irq_err_disable, /** IRQ error disabling function */
.irq_is_pending = uart_nrf5_irq_is_pending, /** IRQ pending status function */
.irq_update = uart_nrf5_irq_update, /** IRQ interrupt update function */
.irq_callback_set = uart_nrf5_irq_callback_set, /** Set the callback function */
.fifo_fill = uart_nrfx_fifo_fill, /** IRQ FIFO fill function */
.fifo_read = uart_nrfx_fifo_read, /** IRQ FIFO read function */
.irq_tx_enable = uart_nrfx_irq_tx_enable, /** IRQ transfer enabling function */
.irq_tx_disable = uart_nrfx_irq_tx_disable, /** IRQ transfer disabling function */
.irq_tx_ready = uart_nrfx_irq_tx_ready, /** IRQ transfer ready function */
.irq_rx_enable = uart_nrfx_irq_rx_enable, /** IRQ receiver enabling function */
.irq_rx_disable = uart_nrfx_irq_rx_disable, /** IRQ receiver disabling function */
.irq_tx_complete = uart_nrfx_irq_tx_complete, /** IRQ transfer complete function */
.irq_rx_ready = uart_nrfx_irq_rx_ready, /** IRQ receiver ready function */
.irq_err_enable = uart_nrfx_irq_err_enable, /** IRQ error enabling function */
.irq_err_disable = uart_nrfx_irq_err_disable, /** IRQ error disabling function */
.irq_is_pending = uart_nrfx_irq_is_pending, /** IRQ pending status function */
.irq_update = uart_nrfx_irq_update, /** IRQ interrupt update function */
.irq_callback_set = uart_nrfx_irq_callback_set, /** Set the callback function */
#endif /* CONFIG_UART_INTERRUPT_DRIVEN */
};
DEVICE_AND_API_INIT(uart_nrfx_uart0,
CONFIG_UART_NRF5_NAME,
uart_nrf5_init,
CONFIG_UART_0_NAME,
uart_nrfx_init,
NULL,
NULL,
POST_KERNEL,
CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
&uart_nrfx_driver_api);
&uart_nrfx_uart_driver_api);

12
samples/application_development/out_of_tree_board/boards/arm/nrf52840_pca10056/Kconfig.defconfig
View File

@ -16,21 +16,21 @@ config GPIO_NRF5_P0
endif # GPIO_NRF5
if UART_NRF5
if UART_NRFX
config UART_NRF5_GPIO_TX_PIN
config UART_0_NRF_TX_PIN
default 6
config UART_NRF5_GPIO_RX_PIN
config UART_0_NRF_RX_PIN
default 8
config UART_NRF5_GPIO_RTS_PIN
config UART_0_NRF_RTS_PIN
default 5
config UART_NRF5_GPIO_CTS_PIN
config UART_0_NRF_CTS_PIN
default 7
endif # UART_NRF5
endif # UART_NRFX
if USB

3
samples/application_development/out_of_tree_board/boards/arm/nrf52840_pca10056/nrf52840_pca10056_defconfig
View File

@ -9,7 +9,8 @@ CONFIG_ARM_MPU_NRF52X=y
# enable uart driver
CONFIG_SERIAL=y
CONFIG_UART_NRF5=y
CONFIG_UART_NRFX=y
CONFIG_UART_0_NRF_UART=y
# enable console
CONFIG_CONSOLE=y

2
samples/bluetooth/hci_uart/microbit.conf
View File

@ -4,7 +4,7 @@ CONFIG_UART_CONSOLE=n
CONFIG_GPIO=y
CONFIG_SERIAL=y
CONFIG_UART_INTERRUPT_DRIVEN=y
CONFIG_UART_NRF5_FLOW_CONTROL=n
CONFIG_UART_NRFX_FLOW_CONTROL=n
CONFIG_MAIN_STACK_SIZE=512
CONFIG_IDLE_STACK_SIZE=256
CONFIG_ISR_STACK_SIZE=512

2
samples/bluetooth/hci_uart/nrf5.conf
View File

@ -4,7 +4,7 @@ CONFIG_UART_CONSOLE=n
CONFIG_GPIO=y
CONFIG_SERIAL=y
CONFIG_UART_INTERRUPT_DRIVEN=y
CONFIG_UART_NRF5_FLOW_CONTROL=y
CONFIG_UART_NRFX_FLOW_CONTROL=y
CONFIG_MAIN_STACK_SIZE=512
CONFIG_SYSTEM_WORKQUEUE_STACK_SIZE=512
CONFIG_BT=y