From 38e60025b0c2ed137109ec5dd8ecae1d09435ac6 Mon Sep 17 00:00:00 2001 From: Jonathan Nilsen Date: Fri, 20 Jun 2025 10:52:01 +0200 Subject: [PATCH] boards: nordic: nrf54h20dk: refactor RAM memory map Refactor the default RAM memory map on nrf54h20dk: Removes use of "nordic,owned-memory" which is no longer needed on nrf54h20. Reserved memory nodes that were under "nordic,owned-memory" have been moved directly under reserved-memory. The memory shared between cpuapp-cpusec and cpurad-cpusec in RAM0x is no longer used with IronSide, since IPC buffers toward the secure domain are at new fixed locations. The cpuapp_data region has been expanded to fill the available space in RAM0x when removing these shared memory regions. Signed-off-by: Jonathan Nilsen --- .../nrf54h20dk_nrf54h20-memory_map.dtsi | 139 +++++------------- .../nrf54h20dk/nrf54h20dk_nrf54h20_cpuapp.dts | 12 -- .../nrf54h20dk_nrf54h20_cpuapp_0_9_0.yaml | 2 +- .../nrf54h20dk/nrf54h20dk_nrf54h20_cpurad.dts | 8 - dts/vendor/nordic/nrf54h20.dtsi | 1 - .../boards/nrf54h20dk_nrf54h20_cpuapp.overlay | 5 - .../boards/nrf54h20dk_nrf54h20_cpuapp.overlay | 4 - .../soc/nrf54h20_cpuapp.overlay | 4 - .../nordic-ppr/soc/nrf54h20_cpuapp.overlay | 4 - .../boards/nrf54h20dk_nrf54h20_cpuapp.overlay | 8 - .../boards/nrf54h20dk_nrf54h20_cpuapp.overlay | 4 - 11 files changed, 36 insertions(+), 155 deletions(-) delete mode 100644 tests/arch/common/ramfunc/boards/nrf54h20dk_nrf54h20_cpuapp.overlay diff --git a/boards/nordic/nrf54h20dk/nrf54h20dk_nrf54h20-memory_map.dtsi b/boards/nordic/nrf54h20dk/nrf54h20dk_nrf54h20-memory_map.dtsi index 7f568005a22..aa6ebc629cc 100644 --- a/boards/nordic/nrf54h20dk/nrf54h20dk_nrf54h20-memory_map.dtsi +++ b/boards/nordic/nrf54h20dk/nrf54h20dk_nrf54h20-memory_map.dtsi @@ -7,62 +7,20 @@ / { reserved-memory { - cpuapp_ram0x_region: memory@2f010000 { - compatible = "nordic,owned-memory"; - reg = <0x2f010000 DT_SIZE_K(260)>; - status = "disabled"; - nordic,access = ; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x0 0x2f010000 0x41000>; - - cpuapp_data: memory@1000 { - reg = <0x1000 DT_SIZE_K(256)>; - }; + cpuapp_data: memory@2f000000 { + reg = <0x2f000000 DT_SIZE_K(760)>; }; - cpurad_ram0x_region: memory@2f051000 { - compatible = "nordic,owned-memory"; - reg = <0x2f051000 DT_SIZE_K(4)>; - status = "disabled"; - nordic,access = ; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x0 0x2f051000 0x1000>; - }; - - etr_buf_ram0x_region: memory@2f0be000 { - compatible = "nordic,owned-memory"; + etr_buffer: memory@2f0be000 { reg = <0x2f0be000 DT_SIZE_K(4)>; - status = "disabled"; - nordic,access = ; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x0 0x2f0be000 0x1000>; - - /* TODO In future move this region to cpuapp_ram0x_region. */ - etr_buffer: memory@0 { - reg = <0x0 DT_SIZE_K(4)>; - }; }; - cpuapp_cpurad_ram0x_region: memory@2f0bf000 { - compatible = "nordic,owned-memory"; - reg = <0x2f0bf000 DT_SIZE_K(4)>; - status = "disabled"; - nordic,access = , - ; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x0 0x2f0bf000 0x1000>; + cpuapp_cpurad_ipc_shm: memory@2f0bf000 { + reg = <0x2f0bf000 DT_SIZE_K(2)>; + }; - cpuapp_cpurad_ipc_shm: memory@0 { - reg = <0x0 DT_SIZE_K(2)>; - }; - - cpurad_cpuapp_ipc_shm: memory@800 { - reg = <0x800 DT_SIZE_K(2)>; - }; + cpurad_cpuapp_ipc_shm: memory@2f0bf800 { + reg = <0x2f0bf800 DT_SIZE_K(2)>; }; cpuapp_cpusys_ipc_shm: memory@2f88f600 { @@ -105,80 +63,53 @@ reg = <0x2f88fd00 0x200>; }; - /* - * NOTE: FLPR has a direct bridge with RAM21 that bypasses MPC. - * This means that when this region is marked as non-executable, - * only FLPR can execute code from it. - */ - ram21_region: memory@2f890000 { - compatible = "nordic,owned-memory"; - status = "disabled"; - reg = <0x2f890000 DT_SIZE_K(64)>; - nordic,access = ; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x0 0x2f890000 0x10000>; - - cpuflpr_code_data: memory@0 { - reg = <0x0 DT_SIZE_K(46)>; - }; - - cpuapp_cpuflpr_ipc_shm: memory@b800 { - reg = <0xb800 DT_SIZE_K(1)>; - }; - - cpuflpr_cpuapp_ipc_shm: memory@bc00 { - reg = <0xbc00 DT_SIZE_K(1)>; - }; - - dma_fast_region: memory@c000 { - compatible = "zephyr,memory-region"; - reg = <0xc000 DT_SIZE_K(16)>; - status = "disabled"; - #memory-region-cells = <0>; - zephyr,memory-region = "DMA_RAM21"; - zephyr,memory-attr = <( DT_MEM_DMA | DT_MEM_CACHEABLE )>; - }; + cpuflpr_code_data: memory@2f890000 { + reg = <0x2f890000 DT_SIZE_K(46)>; }; - cpuppr_ram3x_region: memory@2fc00000 { - compatible = "nordic,owned-memory"; - reg = <0x2fc00000 DT_SIZE_K(64)>; + cpuapp_cpuflpr_ipc_shm: memory@2f89b800 { + reg = <0x2f89b800 DT_SIZE_K(1)>; + }; + + cpuflpr_cpuapp_ipc_shm: memory@2f89bc00 { + reg = <0x2f89bc00 DT_SIZE_K(1)>; + }; + + dma_fast_region: memory@2f89c000 { + compatible = "zephyr,memory-region"; + reg = <0x2f89c000 DT_SIZE_K(16)>; status = "disabled"; - nordic,access = ; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x0 0x2fc00000 0x10000>; + #memory-region-cells = <0>; + zephyr,memory-region = "DMA_RAM21"; + zephyr,memory-attr = <( DT_MEM_DMA | DT_MEM_CACHEABLE )>; + }; - cpuppr_code_data: memory@0 { - reg = <0x0 DT_SIZE_K(62)>; - }; + cpuppr_code_data: memory@2fc00000 { + reg = <0x2fc00000 DT_SIZE_K(62)>; + }; - cpuapp_cpuppr_ipc_shm: memory@f800 { - reg = <0xf800 DT_SIZE_K(1)>; - }; + cpuapp_cpuppr_ipc_shm: memory@2fc0f800 { + reg = <0x2fc0f800 DT_SIZE_K(1)>; + }; - cpuppr_cpuapp_ipc_shm: memory@fc00 { - reg = <0xfc00 DT_SIZE_K(1)>; - }; + cpuppr_cpuapp_ipc_shm: memory@2fc0fc00 { + reg = <0x2fc0fc00 DT_SIZE_K(1)>; }; cpuapp_dma_region: memory@2fc12000 { - compatible = "nordic,owned-memory", "zephyr,memory-region"; + compatible = "zephyr,memory-region"; reg = <0x2fc12000 DT_SIZE_K(4)>; status = "disabled"; #memory-region-cells = <0>; - nordic,access = ; zephyr,memory-region = "DMA_RAM3x_APP"; zephyr,memory-attr = <( DT_MEM_DMA )>; }; cpurad_dma_region: memory@2fc13000 { - compatible = "nordic,owned-memory", "zephyr,memory-region"; + compatible = "zephyr,memory-region"; reg = <0x2fc13000 DT_SIZE_K(1)>; status = "disabled"; #memory-region-cells = <0>; - nordic,access = ; zephyr,memory-region = "DMA_RAM3x_RAD"; zephyr,memory-attr = <( DT_MEM_DMA )>; }; diff --git a/boards/nordic/nrf54h20dk/nrf54h20dk_nrf54h20_cpuapp.dts b/boards/nordic/nrf54h20dk/nrf54h20dk_nrf54h20_cpuapp.dts index 16c573d127e..47255b0c994 100644 --- a/boards/nordic/nrf54h20dk/nrf54h20dk_nrf54h20_cpuapp.dts +++ b/boards/nordic/nrf54h20dk/nrf54h20dk_nrf54h20_cpuapp.dts @@ -109,18 +109,6 @@ }; }; -&cpuapp_ram0x_region { - status = "okay"; -}; - -&etr_buf_ram0x_region { - status = "okay"; -}; - -&ram21_region { - status = "okay"; -}; - &cpuapp_bellboard { status = "okay"; interrupts = <96 NRF_DEFAULT_IRQ_PRIORITY>; diff --git a/boards/nordic/nrf54h20dk/nrf54h20dk_nrf54h20_cpuapp_0_9_0.yaml b/boards/nordic/nrf54h20dk/nrf54h20dk_nrf54h20_cpuapp_0_9_0.yaml index 832689be8e1..4e82987d28e 100644 --- a/boards/nordic/nrf54h20dk/nrf54h20dk_nrf54h20_cpuapp_0_9_0.yaml +++ b/boards/nordic/nrf54h20dk/nrf54h20dk_nrf54h20_cpuapp_0_9_0.yaml @@ -9,7 +9,7 @@ toolchain: - gnuarmemb - zephyr sysbuild: true -ram: 256 +ram: 760 flash: 392 supported: - adc diff --git a/boards/nordic/nrf54h20dk/nrf54h20dk_nrf54h20_cpurad.dts b/boards/nordic/nrf54h20dk/nrf54h20dk_nrf54h20_cpurad.dts index 2813d5b1174..5473d9a7405 100644 --- a/boards/nordic/nrf54h20dk/nrf54h20dk_nrf54h20_cpurad.dts +++ b/boards/nordic/nrf54h20dk/nrf54h20dk_nrf54h20_cpurad.dts @@ -36,14 +36,6 @@ }; }; -&cpuapp_cpurad_ram0x_region { - status = "okay"; -}; - -&cpurad_ram0x_region { - status = "okay"; -}; - &cpurad_bellboard { status = "okay"; interrupts = <96 NRF_DEFAULT_IRQ_PRIORITY>; diff --git a/dts/vendor/nordic/nrf54h20.dtsi b/dts/vendor/nordic/nrf54h20.dtsi index 46e566cbbfe..98a915613ef 100644 --- a/dts/vendor/nordic/nrf54h20.dtsi +++ b/dts/vendor/nordic/nrf54h20.dtsi @@ -14,7 +14,6 @@ #include #include #include -#include #include /delete-node/ &sw_pwm; diff --git a/samples/application_development/code_relocation_nocopy/boards/nrf54h20dk_nrf54h20_cpuapp.overlay b/samples/application_development/code_relocation_nocopy/boards/nrf54h20dk_nrf54h20_cpuapp.overlay index ab53f12725d..98d67e2ad08 100644 --- a/samples/application_development/code_relocation_nocopy/boards/nrf54h20dk_nrf54h20_cpuapp.overlay +++ b/samples/application_development/code_relocation_nocopy/boards/nrf54h20dk_nrf54h20_cpuapp.overlay @@ -1,10 +1,5 @@ -&cpuapp_ram0x_region { - nordic,access = ; -}; - &xip_region { status = "okay"; - nordic,access = ; }; &mx25uw63 { diff --git a/samples/boards/nordic/coresight_stm/boards/nrf54h20dk_nrf54h20_cpuapp.overlay b/samples/boards/nordic/coresight_stm/boards/nrf54h20dk_nrf54h20_cpuapp.overlay index bf5ba18d204..970377c4d89 100644 --- a/samples/boards/nordic/coresight_stm/boards/nrf54h20dk_nrf54h20_cpuapp.overlay +++ b/samples/boards/nordic/coresight_stm/boards/nrf54h20dk_nrf54h20_cpuapp.overlay @@ -7,10 +7,6 @@ status = "okay"; }; -&cpuppr_ram3x_region { - status = "okay"; -}; - &cpuflpr_vpr { status = "okay"; }; diff --git a/snippets/nordic-ppr-xip/soc/nrf54h20_cpuapp.overlay b/snippets/nordic-ppr-xip/soc/nrf54h20_cpuapp.overlay index 4d02921660b..2d884a3455a 100644 --- a/snippets/nordic-ppr-xip/soc/nrf54h20_cpuapp.overlay +++ b/snippets/nordic-ppr-xip/soc/nrf54h20_cpuapp.overlay @@ -3,10 +3,6 @@ * SPDX-License-Identifier: Apache-2.0 */ -&cpuppr_ram3x_region { - status = "okay"; -}; - &cpuppr_vpr { execution-memory = <&cpuppr_code_partition>; /delete-property/ source-memory; diff --git a/snippets/nordic-ppr/soc/nrf54h20_cpuapp.overlay b/snippets/nordic-ppr/soc/nrf54h20_cpuapp.overlay index 75128f42a13..ae635c9ca9b 100644 --- a/snippets/nordic-ppr/soc/nrf54h20_cpuapp.overlay +++ b/snippets/nordic-ppr/soc/nrf54h20_cpuapp.overlay @@ -3,10 +3,6 @@ * SPDX-License-Identifier: Apache-2.0 */ -&cpuppr_ram3x_region { - status = "okay"; -}; - &uart135 { status = "reserved"; }; diff --git a/tests/arch/common/ramfunc/boards/nrf54h20dk_nrf54h20_cpuapp.overlay b/tests/arch/common/ramfunc/boards/nrf54h20dk_nrf54h20_cpuapp.overlay deleted file mode 100644 index ad84324a3e9..00000000000 --- a/tests/arch/common/ramfunc/boards/nrf54h20dk_nrf54h20_cpuapp.overlay +++ /dev/null @@ -1,8 +0,0 @@ -/* - * Copyright (c) 2024 Nordic Semiconductor ASA - * SPDX-License-Identifier: Apache-2.0 - */ - -&cpuapp_ram0x_region { - nordic,access = ; -}; diff --git a/tests/boards/nrf/coresight_stm/boards/nrf54h20dk_nrf54h20_cpuapp.overlay b/tests/boards/nrf/coresight_stm/boards/nrf54h20dk_nrf54h20_cpuapp.overlay index bf5ba18d204..970377c4d89 100644 --- a/tests/boards/nrf/coresight_stm/boards/nrf54h20dk_nrf54h20_cpuapp.overlay +++ b/tests/boards/nrf/coresight_stm/boards/nrf54h20dk_nrf54h20_cpuapp.overlay @@ -7,10 +7,6 @@ status = "okay"; }; -&cpuppr_ram3x_region { - status = "okay"; -}; - &cpuflpr_vpr { status = "okay"; };