From 379dcc719e88907b46404c52dd646c28fa438dca Mon Sep 17 00:00:00 2001 From: Quang Le Date: Fri, 7 Mar 2025 08:19:06 +0000 Subject: [PATCH] drivers: gpio: Add support for RZ/V2L Add GPIO driver support for RZ/V2L Signed-off-by: Quang Le Signed-off-by: Nhut Nguyen --- drivers/gpio/gpio_renesas_rz.h | 28 +- dts/arm/renesas/rz/rzv/r9a07g054.dtsi | 457 ++++++++++++++++++++++++++ 2 files changed, 479 insertions(+), 6 deletions(-) diff --git a/drivers/gpio/gpio_renesas_rz.h b/drivers/gpio/gpio_renesas_rz.h index 7d16145faf7..9dbe9c960f3 100644 --- a/drivers/gpio/gpio_renesas_rz.h +++ b/drivers/gpio/gpio_renesas_rz.h @@ -11,21 +11,41 @@ #define GPIO_RZ_INT_UNSUPPORTED 0xF -#if defined(CONFIG_SOC_SERIES_RZG3S) || defined(CONFIG_SOC_SERIES_RZA3UL) +#if defined(CONFIG_SOC_SERIES_RZG3S) || defined(CONFIG_SOC_SERIES_RZA3UL) || \ + defined(CONFIG_SOC_SERIES_RZV2L) #include #if defined(CONFIG_SOC_SERIES_RZG3S) #define GPIO_RZ_IOPORT_P_REG_BASE_GET (&R_GPIO->P_20) #define GPIO_RZ_IOPORT_PM_REG_BASE_GET (&R_GPIO->PM_20) #define GPIO_RZ_IOPORT_PFC_REG_BASE_GET (&R_GPIO->PFC_20) +#define GPIO_RZ_MAX_PORT_NUM 19 #define GPIO_RZ_TINT_IRQ_OFFSET 429 #define R_INTC R_INTC_IM33 +static const uint8_t gpio_rz_int[GPIO_RZ_MAX_PORT_NUM] = {0, 4, 9, 13, 17, 23, 28, 33, 38, 43, + 47, 52, 56, 58, 63, 66, 70, 72, 76}; + #elif defined(CONFIG_SOC_SERIES_RZA3UL) #define GPIO_RZ_IOPORT_P_REG_BASE_GET (&R_GPIO->P10) #define GPIO_RZ_IOPORT_PM_REG_BASE_GET (&R_GPIO->PM10) #define GPIO_RZ_IOPORT_PFC_REG_BASE_GET (&R_GPIO->PFC10) +#define GPIO_RZ_MAX_PORT_NUM 19 #define GPIO_RZ_TINT_IRQ_OFFSET 476 #define R_INTC R_INTC_IA55 +static const uint8_t gpio_rz_int[GPIO_RZ_MAX_PORT_NUM] = {0, 4, 9, 13, 17, 23, 28, 33, 38, 43, + 47, 52, 56, 58, 63, 66, 70, 72, 76}; + +#elif defined(CONFIG_SOC_SERIES_RZV2L) +#define GPIO_RZ_IOPORT_P_REG_BASE_GET (&R_GPIO->P10) +#define GPIO_RZ_IOPORT_PM_REG_BASE_GET (&R_GPIO->PM10) +#define GPIO_RZ_IOPORT_PFC_REG_BASE_GET (&R_GPIO->PFC10) +#define GPIO_RZ_MAX_PORT_NUM 49 +#define GPIO_RZ_TINT_IRQ_OFFSET 444 +#define R_INTC R_INTC_IM33 +static const uint8_t gpio_rz_int[GPIO_RZ_MAX_PORT_NUM] = { + 0, 2, 4, 6, 8, 10, 13, 15, 18, 21, 24, 25, 27, 29, 32, 34, 36, + 38, 41, 43, 45, 48, 50, 52, 54, 56, 58, 60, 62, 64, 66, 68, 70, 72, + 74, 76, 78, 80, 83, 85, 88, 91, 93, 98, 102, 106, 110, 114, 118}; #endif #define GPIO_RZ_IOPORT_P_REG_GET(port, pin) (&GPIO_RZ_IOPORT_P_REG_BASE_GET[port + (pin / 4)]) @@ -40,8 +60,7 @@ #define GPIO_RZ_PIN_DISCONNECT(port, pin) /* do nothing */ -#define GPIO_RZ_MAX_PORT_NUM 19 -#define GPIO_RZ_MAX_INT_NUM 32 +#define GPIO_RZ_MAX_INT_NUM 32 #define GPIO_RZ_TINT_IRQ_GET(tint_num) (tint_num + GPIO_RZ_TINT_IRQ_OFFSET) @@ -63,9 +82,6 @@ #define GPIO_RZ_PIN_CONFIGURE_INPUT_OUTPUT_RESET (~(0x3 << 2)) #define GPIO_RZ_PIN_SPECIAL_FLAG_GET(flag) GPIO_RZ_PIN_CONFIGURE_GET_FILTER(flag) -static const uint8_t gpio_rz_int[GPIO_RZ_MAX_PORT_NUM] = {0, 4, 9, 13, 17, 23, 28, 33, 38, 43, - 47, 52, 56, 58, 63, 66, 70, 72, 76}; - #elif defined(CONFIG_SOC_SERIES_RZN2L) || defined(CONFIG_SOC_SERIES_RZT2L) #include #define GPIO_RZ_IOPORT_REG_REGION_GET(p) (R_BSP_IoRegionGet(p) == BSP_IO_REGION_NOT_SAFE ? 1 : 0) diff --git a/dts/arm/renesas/rz/rzv/r9a07g054.dtsi b/dts/arm/renesas/rz/rzv/r9a07g054.dtsi index 8227ff235f9..fc98bcf74f8 100644 --- a/dts/arm/renesas/rz/rzv/r9a07g054.dtsi +++ b/dts/arm/renesas/rz/rzv/r9a07g054.dtsi @@ -36,6 +36,463 @@ compatible = "renesas,rzv-pinctrl"; reg = <0x41030000 DT_SIZE_K(64)>; reg-names = "pinctrl"; + + gpio: gpio-common { + compatible = "renesas,rz-gpio-int"; + interrupts = + <444 10>, <445 10>, <446 10>, <447 10>, + <448 10>, <449 10>, <450 10>, <451 10>, + <452 10>, <453 10>, <454 10>, <455 10>, + <456 10>, <457 10>, <458 10>, <459 10>, + <460 10>, <461 10>, <462 10>, <463 10>, + <464 10>, <465 10>, <466 10>, <467 10>, + <468 10>, <469 10>, <470 10>, <471 10>, + <472 10>, <473 10>, <474 10>, <475 10>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + + gpio0: gpio@0 { + compatible = "renesas,rz-gpio"; + gpio-controller; + #gpio-cells = <2>; + ngpios = <2>; + reg = <0x0>; + status = "disabled"; + }; + + gpio1: gpio@100 { + compatible = "renesas,rz-gpio"; + gpio-controller; + #gpio-cells = <2>; + ngpios = <2>; + reg = <0x100>; + status = "disabled"; + }; + + gpio2: gpio@200 { + compatible = "renesas,rz-gpio"; + gpio-controller; + #gpio-cells = <2>; + ngpios = <2>; + reg = <0x200>; + status = "disabled"; + }; + + gpio3: gpio@300 { + compatible = "renesas,rz-gpio"; + gpio-controller; + #gpio-cells = <2>; + ngpios = <2>; + reg = <0x300>; + status = "disabled"; + }; + + gpio4: gpio@400 { + compatible = "renesas,rz-gpio"; + gpio-controller; + #gpio-cells = <2>; + ngpios = <2>; + reg = <0x400>; + status = "disabled"; + }; + + gpio5: gpio@500 { + compatible = "renesas,rz-gpio"; + gpio-controller; + #gpio-cells = <2>; + ngpios = <3>; + reg = <0x500>; + status = "disabled"; + }; + + gpio6: gpio@600 { + compatible = "renesas,rz-gpio"; + gpio-controller; + #gpio-cells = <2>; + ngpios = <2>; + reg = <0x600>; + status = "disabled"; + }; + + gpio7: gpio@700 { + compatible = "renesas,rz-gpio"; + gpio-controller; + #gpio-cells = <2>; + ngpios = <3>; + reg = <0x700>; + status = "disabled"; + }; + + gpio8: gpio@800 { + compatible = "renesas,rz-gpio"; + gpio-controller; + #gpio-cells = <2>; + ngpios = <3>; + reg = <0x800>; + status = "disabled"; + }; + + gpio9: gpio@900 { + compatible = "renesas,rz-gpio"; + gpio-controller; + #gpio-cells = <2>; + ngpios = <2>; + reg = <0x900>; + status = "disabled"; + }; + + gpio10: gpio@a00 { + compatible = "renesas,rz-gpio"; + gpio-controller; + #gpio-cells = <2>; + ngpios = <2>; + reg = <0xa00>; + status = "disabled"; + }; + + gpio11: gpio@b00 { + compatible = "renesas,rz-gpio"; + gpio-controller; + #gpio-cells = <2>; + ngpios = <2>; + reg = <0xb00>; + status = "disabled"; + }; + + gpio12: gpio@c00 { + compatible = "renesas,rz-gpio"; + gpio-controller; + #gpio-cells = <2>; + ngpios = <2>; + reg = <0xc00>; + status = "disabled"; + }; + + gpio13: gpio@d00 { + compatible = "renesas,rz-gpio"; + gpio-controller; + #gpio-cells = <2>; + ngpios = <3>; + reg = <0xd00>; + status = "disabled"; + }; + + gpio14: gpio@e00 { + compatible = "renesas,rz-gpio"; + gpio-controller; + #gpio-cells = <2>; + ngpios = <2>; + reg = <0xe00>; + status = "disabled"; + }; + + gpio15: gpio@f00 { + compatible = "renesas,rz-gpio"; + gpio-controller; + #gpio-cells = <2>; + ngpios = <2>; + reg = <0xf00>; + status = "disabled"; + }; + + gpio16: gpio@1000 { + compatible = "renesas,rz-gpio"; + gpio-controller; + #gpio-cells = <2>; + ngpios = <2>; + reg = <0x1000>; + status = "disabled"; + }; + + gpio17: gpio@1100 { + compatible = "renesas,rz-gpio"; + gpio-controller; + #gpio-cells = <2>; + ngpios = <3>; + reg = <0x1100>; + status = "disabled"; + }; + + gpio18: gpio@1200 { + compatible = "renesas,rz-gpio"; + gpio-controller; + #gpio-cells = <2>; + ngpios = <2>; + reg = <0x1200>; + status = "disabled"; + }; + + gpio19: gpio@1300 { + compatible = "renesas,rz-gpio"; + gpio-controller; + #gpio-cells = <2>; + ngpios = <2>; + reg = <0x1300>; + status = "disabled"; + }; + + gpio20: gpio@1400 { + compatible = "renesas,rz-gpio"; + gpio-controller; + #gpio-cells = <2>; + ngpios = <3>; + reg = <0x1400>; + status = "disabled"; + }; + + gpio21: gpio@1500 { + compatible = "renesas,rz-gpio"; + gpio-controller; + #gpio-cells = <2>; + ngpios = <2>; + reg = <0x1500>; + status = "disabled"; + }; + + gpio22: gpio@1600 { + compatible = "renesas,rz-gpio"; + gpio-controller; + #gpio-cells = <2>; + ngpios = <2>; + reg = <0x1600>; + status = "disabled"; + }; + + gpio23: gpio@1700 { + compatible = "renesas,rz-gpio"; + gpio-controller; + #gpio-cells = <2>; + ngpios = <2>; + reg = <0x1700>; + status = "disabled"; + }; + + gpio24: gpio@1800 { + compatible = "renesas,rz-gpio"; + gpio-controller; + #gpio-cells = <2>; + ngpios = <2>; + reg = <0x1800>; + status = "disabled"; + }; + + gpio25: gpio@1900 { + compatible = "renesas,rz-gpio"; + gpio-controller; + #gpio-cells = <2>; + ngpios = <2>; + reg = <0x1900>; + status = "disabled"; + }; + + gpio26: gpio@1a00 { + compatible = "renesas,rz-gpio"; + gpio-controller; + #gpio-cells = <2>; + ngpios = <2>; + reg = <0x1a00>; + status = "disabled"; + }; + + gpio27: gpio@1b00 { + compatible = "renesas,rz-gpio"; + gpio-controller; + #gpio-cells = <2>; + ngpios = <2>; + reg = <0x1b00>; + status = "disabled"; + }; + + gpio28: gpio@1c00 { + compatible = "renesas,rz-gpio"; + gpio-controller; + #gpio-cells = <2>; + ngpios = <2>; + reg = <0x1c00>; + status = "disabled"; + }; + + gpio29: gpio@1d00 { + compatible = "renesas,rz-gpio"; + gpio-controller; + #gpio-cells = <2>; + ngpios = <2>; + reg = <0x1d00>; + status = "disabled"; + }; + + gpio30: gpio@1e00 { + compatible = "renesas,rz-gpio"; + gpio-controller; + #gpio-cells = <2>; + ngpios = <2>; + reg = <0x1e00>; + status = "disabled"; + }; + + gpio31: gpio@1f00 { + compatible = "renesas,rz-gpio"; + gpio-controller; + #gpio-cells = <2>; + ngpios = <2>; + reg = <0x1f00>; + status = "disabled"; + }; + + gpio32: gpio@2000 { + compatible = "renesas,rz-gpio"; + gpio-controller; + #gpio-cells = <2>; + ngpios = <2>; + reg = <0x2000>; + status = "disabled"; + }; + + gpio33: gpio@2100 { + compatible = "renesas,rz-gpio"; + gpio-controller; + #gpio-cells = <2>; + ngpios = <2>; + reg = <0x2100>; + status = "disabled"; + }; + + gpio34: gpio@2200 { + compatible = "renesas,rz-gpio"; + gpio-controller; + #gpio-cells = <2>; + ngpios = <2>; + reg = <0x2200>; + status = "disabled"; + }; + + gpio35: gpio@2300 { + compatible = "renesas,rz-gpio"; + gpio-controller; + #gpio-cells = <2>; + ngpios = <2>; + reg = <0x2300>; + status = "disabled"; + }; + + gpio36: gpio@2400 { + compatible = "renesas,rz-gpio"; + gpio-controller; + #gpio-cells = <2>; + ngpios = <2>; + reg = <0x2400>; + status = "disabled"; + }; + + gpio37: gpio@2500 { + compatible = "renesas,rz-gpio"; + gpio-controller; + #gpio-cells = <2>; + ngpios = <3>; + reg = <0x2500>; + status = "disabled"; + }; + + gpio38: gpio@2600 { + compatible = "renesas,rz-gpio"; + gpio-controller; + #gpio-cells = <2>; + ngpios = <2>; + reg = <0x2600>; + status = "disabled"; + }; + + gpio39: gpio@2700 { + compatible = "renesas,rz-gpio"; + gpio-controller; + #gpio-cells = <2>; + ngpios = <3>; + reg = <0x2700>; + status = "disabled"; + }; + + gpio40: gpio@2800 { + compatible = "renesas,rz-gpio"; + gpio-controller; + #gpio-cells = <2>; + ngpios = <3>; + reg = <0x2800>; + status = "disabled"; + }; + + gpio41: gpio@2900 { + compatible = "renesas,rz-gpio"; + gpio-controller; + #gpio-cells = <2>; + ngpios = <2>; + reg = <0x2900>; + status = "disabled"; + }; + + gpio42: gpio@2a00 { + compatible = "renesas,rz-gpio"; + gpio-controller; + #gpio-cells = <2>; + ngpios = <5>; + reg = <0x2a00>; + status = "disabled"; + }; + + gpio43: gpio@2b00 { + compatible = "renesas,rz-gpio"; + gpio-controller; + #gpio-cells = <2>; + ngpios = <4>; + reg = <0x2b00>; + status = "disabled"; + }; + + gpio44: gpio@2c00 { + compatible = "renesas,rz-gpio"; + gpio-controller; + #gpio-cells = <2>; + ngpios = <4>; + reg = <0x2c00>; + status = "disabled"; + }; + + gpio45: gpio@2d00 { + compatible = "renesas,rz-gpio"; + gpio-controller; + #gpio-cells = <2>; + ngpios = <4>; + reg = <0x2d00>; + status = "disabled"; + }; + + gpio46: gpio@2e00 { + compatible = "renesas,rz-gpio"; + gpio-controller; + #gpio-cells = <2>; + ngpios = <4>; + reg = <0x2e00>; + status = "disabled"; + }; + + gpio47: gpio@2f00 { + compatible = "renesas,rz-gpio"; + gpio-controller; + #gpio-cells = <2>; + ngpios = <4>; + reg = <0x2f00>; + status = "disabled"; + }; + + gpio48: gpio@3000 { + compatible = "renesas,rz-gpio"; + gpio-controller; + #gpio-cells = <2>; + ngpios = <5>; + reg = <0x3000>; + status = "disabled"; + }; + }; }; scif0: serial@4004b800 {