From 35a3ddaa09af9808d4949c685a902bdef8b2ddb4 Mon Sep 17 00:00:00 2001 From: Harini T Date: Mon, 27 Jan 2025 19:13:39 +0530 Subject: [PATCH] dts: bindings: watchdog: Add Xilinx Window Watchdog Timer Xilinx Window Watchdog Timer IP uses window mode. Window watchdog timer(WWDT) contains closed(first) and open(second) window with 32 bit width each. Write to the watchdog timer within predefined window periods of time. This means a period that is not too soon and a period that is not too late. The WWDT error interrupts (IRQs) occur when the watchdog timer is not serviced within the predefined window periods. These IRQs are routed to the Processing System Manager (PSM) error accumulator module. The PSM is responsible for managing power and system-level errors, generating a System on Chip (SoC) reset when a WWDT error occurs. The system reset event is signaled as a system error for the PSM firmware to handle and a reset output signal to the MIO/EMIO. Signed-off-by: Harini T --- dts/bindings/watchdog/xlnx,versal-wwdt.yaml | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) create mode 100644 dts/bindings/watchdog/xlnx,versal-wwdt.yaml diff --git a/dts/bindings/watchdog/xlnx,versal-wwdt.yaml b/dts/bindings/watchdog/xlnx,versal-wwdt.yaml new file mode 100644 index 00000000000..2b766cdc5a2 --- /dev/null +++ b/dts/bindings/watchdog/xlnx,versal-wwdt.yaml @@ -0,0 +1,16 @@ +# Copyright (c) 2025 Advanced Micro Devices, Inc. +# SPDX-License-Identifier: Apache-2.0 + +description: Xilinx window watchdog + +compatible: "xlnx,versal-wwdt" + +include: base.yaml + +properties: + reg: + required: true + + clocks: + required: true + description: Reference to clock for window watchdog core.