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drivers: eth: enc28j60: Misc fixes

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- Bank select mask should be 0x03:

| b7    | b6    | b5    | b4     | b3    | b2   | b1     | b0     |
|------:|------:|------:|-------:|------:|-----:|-------:|-------:|
| TXRST | RXRST | DMAST | CSUMEN | TXRTS | RXEN | BSEL1  | BSEL0  |

See  **REGISTER 3-1: ECON1: ETHERNET CONTROL REGISTER 1**

- ENC28J60_BIT_PHCON2_HDLDIS should be 0x0100

|b15| b14   |b13   |b12|b11|b10    |b9|b8     |b7|b6|b5|b4|b3|b2|b1|b0|
|--:|------:|-----:|--:|--:|------:|-:|------:|-:|-:|-:|-:|-:|-:|-:|-:|
| - |FRCLNK |TXDIS |r  |r  |JABBER |r |HDLDIS |r |r |r |r |r |r |r |r |

see **REGISTER 6-5: PHCON2: PHY CONTROL REGISTER 2**

- remove duplicate definitions

ENC28J60Data Sheet:
https://ww1.microchip.com/downloads/en/DeviceDoc/39662c.pdf

Signed-off-by: Ahmed Zamouche <ahmed.zamouche1@assaabloy.com>
This commit is contained in:
Ahmed Zamouche 2024-08-23 09:11:24 +02:00 committed by Benjamin Cabé
parent 1d4b1ade43
commit 305ceba920
2 changed files with 2 additions and 4 deletions
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2
drivers/ethernet/eth_enc28j60.c
View File

@ -71,7 +71,7 @@ static void eth_enc28j60_set_bank(const struct device *dev, uint16_t reg_addr)
if (!spi_transceive_dt(&config->spi, &tx, &rx)) {
buf[0] = ENC28J60_SPI_WCR | ENC28J60_REG_ECON1;
buf[1] = (buf[1] & 0xFC) | ((reg_addr >> 8) & 0x0F);
buf[1] = (buf[1] & 0xFC) | ((reg_addr >> 8) & 0x03);
spi_write_dt(&config->spi, &tx);
} else {

4
drivers/ethernet/eth_enc28j60_priv.h
View File

@ -141,7 +141,6 @@
#define ENC28J60_BIT_MICMD_MIIRD (0x01)
#define ENC28J60_BIT_MISTAT_BUSY (0x01)
#define ENC28J60_BIT_ESTAT_CLKRDY (0x01)
#define ENC28J60_BIT_MACON1_MARXEN (0x01)
#define ENC28J60_BIT_MACON1_RXPAUS (0x04)
#define ENC28J60_BIT_MACON1_TXPAUS (0x08)
#define ENC28J60_BIT_MACON1_MARXEN (0x01)
@ -151,7 +150,6 @@
#define ENC28J60_BIT_ECON1_TXRTS (0x08)
#define ENC28J60_BIT_ECON1_RXEN (0x04)
#define ENC28J60_BIT_ECON2_PKTDEC (0x40)
#define ENC28J60_BIT_EIR_PKTIF (0x40)
#define ENC28J60_BIT_EIE_TXIE (0x08)
#define ENC28J60_BIT_EIE_PKTIE (0x40)
#define ENC28J60_BIT_EIE_LINKIE (0x10)
@ -166,7 +164,7 @@
#define ENC28J60_BIT_ESTAT_TXABRT (0x02)
#define ENC28J60_BIT_ESTAT_LATECOL (0x10)
#define ENC28J60_BIT_PHCON1_PDPXMD (0x0100)
#define ENC28J60_BIT_PHCON2_HDLDIS (0x0001)
#define ENC28J60_BIT_PHCON2_HDLDIS (0x0100)
#define ENC28J60_BIT_PHSTAT2_LSTAT (0x0400)
#define ENC28J60_BIT_PHIE_PGEIE (0x0002)
#define ENC28J60_BIT_PHIE_PLNKIE (0x0010)