From 305a7e6c8d138eafe2cd54aef76a88377fa15834 Mon Sep 17 00:00:00 2001 From: Declan Snyder Date: Thu, 26 Jun 2025 11:26:51 -0500 Subject: [PATCH] soc: nxp: imxrt: Remove ifdef around DCDC The DCDC should be on all the platforms and the functions and structs should therefore be defined on all the platforms. So the ifdef is not needed, we can remove it to increase code compilation coverage unity across configurations slightly. Compiler should optimize out the block when IS_ENABLED is false statically. Signed-off-by: Declan Snyder --- soc/nxp/imxrt/imxrt10xx/soc.c | 16 ++++++++-------- soc/nxp/imxrt/imxrt11xx/soc.c | 6 +++--- 2 files changed, 11 insertions(+), 11 deletions(-) diff --git a/soc/nxp/imxrt/imxrt10xx/soc.c b/soc/nxp/imxrt/imxrt10xx/soc.c index 655c7d70e5f..bcaf35fc15d 100644 --- a/soc/nxp/imxrt/imxrt10xx/soc.c +++ b/soc/nxp/imxrt/imxrt10xx/soc.c @@ -114,15 +114,15 @@ __weak void clock_init(void) /* Set PERIPH_CLK MUX to PERIPH_CLK2 */ CLOCK_SetMux(kCLOCK_PeriphMux, 0x1); -#if CONFIG_ADJUST_DCDC - /* Setting the VDD_SOC value */ - DCDC->REG3 = (DCDC->REG3 & (~DCDC_REG3_TRG_MASK)) | DCDC_REG3_TRG(CONFIG_DCDC_VALUE); - /* Waiting for DCDC_STS_DC_OK bit is asserted */ - while (DCDC_REG0_STS_DC_OK_MASK != - (DCDC_REG0_STS_DC_OK_MASK & DCDC->REG0)) { - ; + if (IS_ENABLED(CONFIG_ADJUST_DCDC)) { + /* Setting the VDD_SOC value */ + DCDC->REG3 = (DCDC->REG3 & (~DCDC_REG3_TRG_MASK)) | + DCDC_REG3_TRG(CONFIG_DCDC_VALUE); + /* Waiting for DCDC_STS_DC_OK bit is asserted */ + while (DCDC_REG0_STS_DC_OK_MASK != (DCDC_REG0_STS_DC_OK_MASK & DCDC->REG0)) { + ; + } } -#endif #ifdef CONFIG_INIT_ARM_PLL /* ARM PLL configuration for RUN mode */ diff --git a/soc/nxp/imxrt/imxrt11xx/soc.c b/soc/nxp/imxrt/imxrt11xx/soc.c index 75a77de4691..c6f53c7f7b3 100644 --- a/soc/nxp/imxrt/imxrt11xx/soc.c +++ b/soc/nxp/imxrt/imxrt11xx/soc.c @@ -133,9 +133,9 @@ __weak void clock_init(void) { clock_root_config_t rootCfg = {0}; -#if CONFIG_ADJUST_DCDC - DCDC_SetVDD1P0BuckModeTargetVoltage(DCDC, kDCDC_1P0BuckTarget1P15V); -#endif + if (IS_ENABLED(CONFIG_ADJUST_DCDC)) { + DCDC_SetVDD1P0BuckModeTargetVoltage(DCDC, kDCDC_1P0BuckTarget1P15V); + } /* RT1160 does not have Forward Body Biasing on the CM7 core */ #if defined(CONFIG_SOC_MIMXRT1176_CM4) || defined(CONFIG_SOC_MIMXRT1176_CM7)