drivers: ambiq: Add spi/i2c support for apollo510

This commit adds spi and i2c support for apollo510

Signed-off-by: Hao Luo <hluo@ambiq.com>
This commit is contained in:
Hao Luo 2025-04-23 10:43:15 +08:00 committed by Benjamin Cabé
parent 389103dfec
commit 22ffba549d
3 changed files with 297 additions and 0 deletions

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@ -24,6 +24,123 @@
};
};
i2c0_default: i2c0_default {
group1 {
pinmux = <M0SCL_P5>, <M0SDAWIR3_P6>;
drive-open-drain;
drive-strength = "0.5";
bias-pull-up;
};
};
i2c1_default: i2c1_default {
group1 {
pinmux = <M1SCL_P8>, <M1SDAWIR3_P9>;
drive-open-drain;
drive-strength = "0.5";
bias-pull-up;
};
};
i2c2_default: i2c2_default {
group1 {
pinmux = <M2SCL_P25>, <M2SDAWIR3_P26>;
drive-open-drain;
drive-strength = "0.5";
bias-pull-up;
};
};
i2c3_default: i2c3_default {
group1 {
pinmux = <M3SCL_P31>, <M3SDAWIR3_P32>;
drive-open-drain;
drive-strength = "0.5";
bias-pull-up;
};
};
i2c5_default: i2c5_default {
group1 {
pinmux = <M5SCL_P47>, <M5SDAWIR3_P48>;
drive-open-drain;
drive-strength = "0.5";
bias-pull-up;
};
};
i2c6_default: i2c6_default {
group1 {
pinmux = <M6SCL_P61>, <M6SDAWIR3_P62>;
drive-open-drain;
drive-strength = "0.5";
bias-pull-up;
};
};
i2c7_default: i2c7_default {
group1 {
pinmux = <M7SCL_P22>, <M7SDAWIR3_P23>;
drive-open-drain;
drive-strength = "0.5";
bias-pull-up;
};
};
spid0_default: spid0_default {
group1 {
pinmux = <SLSCK_P11>, <SLMISO_P83>, <SLMOSI_P52>, <SLnCE_P13>;
};
};
spi0_default: spi0_default {
group1 {
pinmux = <M0SCK_P5>, <M0MISO_P7>, <M0MOSI_P6>;
};
};
spi1_default: spi1_default {
group1 {
pinmux = <M1SCK_P8>, <M1MISO_P10>, <M1MOSI_P9>;
};
};
spi2_default: spi2_default {
group1 {
pinmux = <M2SCK_P25>, <M2MISO_P27>, <M2MOSI_P26>;
};
};
spi3_default: spi3_default {
group1 {
pinmux = <M3SCK_P31>, <M3MISO_P33>, <M3MOSI_P32>;
};
};
spi4_default: spi4_default {
group1 {
pinmux = <M4SCK_P34>, <M4MISO_P36>, <M4MOSI_P35>;
};
};
spi5_default: spi5_default {
group1 {
pinmux = <M5SCK_P47>, <M5MISO_P49>, <M5MOSI_P48>;
};
};
spi6_default: spi6_default {
group1 {
pinmux = <M6SCK_P61>, <M6MISO_P63>, <M6MOSI_P62>;
};
};
spi7_default: spi7_default {
group1 {
pinmux = <M7SCK_P22>, <M7MISO_P24>, <M7MOSI_P23>;
};
};
mspi0_default: mspi0_default {
group0 {
pinmux = <MSPI0_0_P64>,

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@ -12,6 +12,8 @@ supported:
- watchdog
- counter
- gpio
- spi
- i2c
- rtc
- clock_control
- mspi

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@ -291,6 +291,184 @@
status = "disabled";
};
spid0: spi@IOSLAVE_BASE_NAME {
compatible = "ambiq,spid";
reg = <IOSLAVE_REG_BASE IOSLAVE_REG_SIZE>;
#address-cells = <1>;
#size-cells = <0>;
interrupts = <4 0>;
status = "disabled";
zephyr,pm-device-runtime-auto;
};
iom0: iom@IOM0_BASE_NAME {
compatible = "ambiq,iom";
reg = <IOM0_REG_BASE IOM0_REG_SIZE>;
interrupts = <6 0>;
spi {
compatible = "ambiq,spi";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
zephyr,pm-device-runtime-auto;
};
i2c {
compatible = "ambiq,i2c";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
zephyr,pm-device-runtime-auto;
};
};
iom1: iom@IOM1_BASE_NAME {
compatible = "ambiq,iom";
reg = <IOM1_REG_BASE IOM1_REG_SIZE>;
interrupts = <7 0>;
spi {
compatible = "ambiq,spi";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
zephyr,pm-device-runtime-auto;
};
i2c {
compatible = "ambiq,i2c";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
zephyr,pm-device-runtime-auto;
};
};
iom2: iom@IOM2_BASE_NAME {
compatible = "ambiq,iom";
reg = <IOM2_REG_BASE IOM2_REG_SIZE>;
interrupts = <8 0>;
spi {
compatible = "ambiq,spi";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
zephyr,pm-device-runtime-auto;
};
i2c {
compatible = "ambiq,i2c";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
zephyr,pm-device-runtime-auto;
};
};
iom3: iom@IOM3_BASE_NAME {
compatible = "ambiq,iom";
reg = <IOM3_REG_BASE IOM3_REG_SIZE>;
interrupts = <9 0>;
spi {
compatible = "ambiq,spi";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
zephyr,pm-device-runtime-auto;
};
i2c {
compatible = "ambiq,i2c";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
zephyr,pm-device-runtime-auto;
};
};
iom4: iom@IOM4_BASE_NAME {
compatible = "ambiq,iom";
reg = <IOM4_REG_BASE IOM4_REG_SIZE>;
interrupts = <10 0>;
spi {
compatible = "ambiq,spi";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
zephyr,pm-device-runtime-auto;
};
i2c {
compatible = "ambiq,i2c";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
zephyr,pm-device-runtime-auto;
};
};
iom5: iom@IOM5_BASE_NAME {
compatible = "ambiq,iom";
reg = <IOM5_REG_BASE IOM5_REG_SIZE>;
interrupts = <11 0>;
spi {
compatible = "ambiq,spi";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
zephyr,pm-device-runtime-auto;
};
i2c {
compatible = "ambiq,i2c";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
zephyr,pm-device-runtime-auto;
};
};
iom6: iom@IOM6_BASE_NAME {
compatible = "ambiq,iom";
reg = <IOM6_REG_BASE IOM6_REG_SIZE>;
interrupts = <12 0>;
spi {
compatible = "ambiq,spi";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
zephyr,pm-device-runtime-auto;
};
i2c {
compatible = "ambiq,i2c";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
zephyr,pm-device-runtime-auto;
};
};
iom7: iom@IOM7_BASE_NAME {
compatible = "ambiq,iom";
reg = <IOM7_REG_BASE IOM7_REG_SIZE>;
interrupts = <13 0>;
spi {
compatible = "ambiq,spi";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
zephyr,pm-device-runtime-auto;
};
i2c {
compatible = "ambiq,i2c";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
zephyr,pm-device-runtime-auto;
};
};
uart0: uart@UART0_BASE_NAME {
compatible = "ambiq,uart", "arm,pl011";
reg = <UART0_REG_BASE UART0_REG_SIZE>;