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arc: make SRAM/DCCM values configurable

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Remove hardcoding and make the values configurable. Also make the
Kconfig variables consistent with other architectures.

Change-Id: I69334002303d4d8abaf7363d9134fd5f46ce4eeb
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This commit is contained in:
Anas Nashif 2016-04-23 21:37:48 -04:00 committed by Anas Nashif
parent d18b584427
commit 1a1f7fd916
7 changed files with 69 additions and 24 deletions
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49
arch/arc/Kconfig
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@ -54,14 +54,6 @@ config CPU_ARCV2
help
This option signifies the use of a CPU of the ARCv2 family.
config RAM_START
prompt "RAM start address"
hex
config RAM_SIZE
prompt "RAM size (in kB)"
int
config NSIM
prompt "Running on the MetaWare nSIM simulator"
bool
@ -164,6 +156,47 @@ config XIP
default n if NSIM
default y
config DCCM_SIZE
int "DCCM Size in kB"
help
This option specifies the size of the DCCM in kB. It is normally set by
the platform's defconfig file and the user should generally avoid modifying
it via the menu configuration.
config DCCM_BASE_ADDRESS
hex "DCCM Base Address"
help
This option specifies the base address of the DCCM on the platform. It is
normally set by the platform's defconfig file and the user should generally
avoid modifying it via the menu configuration.
config SRAM_SIZE
int "SRAM Size in kB"
help
This option specifies the size of the SRAM in kB. It is normally set by
the platform's defconfig file and the user should generally avoid modifying
it via the menu configuration.
config SRAM_BASE_ADDRESS
hex "SRAM Base Address"
help
This option specifies the base address of the SRAM on the platform. It is
normally set by the platform's defconfig file and the user should generally
avoid modifying it via the menu configuration.
config FLASH_SIZE
int "Flash Size in kB"
help
This option specifies the size of the flash in kB. It is normally set by
the platform's defconfig file and the user should generally avoid modifying
it via the menu configuration.
config FLASH_BASE_ADDRESS
hex "Flash Base Address"
help
This option specifies the base address of the flash on the platform. It is
normally set by the platform's defconfig file and the user should generally
avoid modifying it via the menu configuration.
config NSIM
prompt "Running on the MetaWare nSIM simulator"
bool

2
arch/arc/core/reset.S
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@ -28,7 +28,7 @@
#include <sections.h>
#include <arch/cpu.h>
#define _RAM_END (CONFIG_RAM_START + CONFIG_RAM_SIZE * 1024)
#define _RAM_END (CONFIG_SRAM_BASE_ADDRESS + CONFIG_SRAM_SIZE * 1024)
GTEXT(__reset)

16
arch/arc/soc/quark_se_ss/Kconfig.defconfig
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@ -37,14 +37,26 @@ config NUM_IRQS
config SYS_CLOCK_HW_CYCLES_PER_SEC
default 32000000
config RAM_START
config FLASH_BASE_ADDRESS
default 0x40000000
config FLASH_SIZE
default 152
config SRAM_BASE_ADDRESS
default 0x4000 if NSIM
default 0xa8000400
config RAM_SIZE
config SRAM_SIZE
default 16 if NSIM
default 24
config DCCM_BASE_ADDRESS
default 0x80000000
config DCCM_SIZE
default 8
if GPIO
config GPIO_DW

12
arch/arc/soc/quark_se_ss/linker.cmd
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@ -20,8 +20,8 @@
*/
/* Flash base address and size */
#define FLASH_START 0x40000000 /* Flash bank 1 */
#define FLASH_SIZE 152K
#define FLASH_START CONFIG_FLASH_BASE_ADDRESS /* Flash bank 1 */
#define FLASH_SIZE CONFIG_FLASH_SIZE
/*
* SRAM base address and size
@ -29,11 +29,11 @@
* Internal SRAM includes the exception vector table at reset, which is at
* the beginning of the region.
*/
#define SRAM_START CONFIG_RAM_START
#define SRAM_SIZE CONFIG_RAM_SIZE
#define SRAM_START CONFIG_SRAM_BASE_ADDRESS
#define SRAM_SIZE CONFIG_SRAM_SIZE
/* Data Closely Coupled Memory (DCCM) base address and size */
#define DCCM_START 0x80000000
#define DCCM_SIZE 8K
#define DCCM_START CONFIG_DCCM_BASE_ADDRESS
#define DCCM_SIZE CONFIG_DCCM_SIZE
#include <arch/arc/v2/linker.cmd>

4
boards/arduino_101_sss/Makefile.board
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@ -1,7 +1,7 @@
FLASH_SCRIPT = openocd.sh
OPENOCD_PRE_CMD = "-c targets 1"
OPENOCD_LOAD_CMD = "load_image ${O}/${KERNEL_BIN_NAME} 0x40000000"
OPENOCD_VERIFY_CMD = "verify_image ${O}/${KERNEL_BIN_NAME} 0x40000000"
OPENOCD_LOAD_CMD = "load_image ${O}/${KERNEL_BIN_NAME} $(CONFIG_FLASH_BASE_ADDRESS)"
OPENOCD_VERIFY_CMD = "verify_image ${O}/${KERNEL_BIN_NAME} $(CONFIG_FLASH_BASE_ADDRESS)"
GDB_PORT = 3334

4
boards/quark_se_sss_devboard/Makefile.board
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@ -1,6 +1,6 @@
FLASH_SCRIPT = openocd.sh
OPENOCD_PRE_CMD = "-c targets 1"
OPENOCD_LOAD_CMD = "load_image ${O}/${KERNEL_BIN_NAME} 0x40000000"
OPENOCD_VERIFY_CMD = "verify_image ${O}/${KERNEL_BIN_NAME} 0x40000000"
OPENOCD_LOAD_CMD = "load_image ${O}/${KERNEL_BIN_NAME} $(CONFIG_FLASH_BASE_ADDRESS)"
OPENOCD_VERIFY_CMD = "verify_image ${O}/${KERNEL_BIN_NAME} $(CONFIG_FLASH_BASE_ADDRESS)"
export OPENOCD_PRE_CMD FLASH_SCRIPT OPENOCD_VERIFY_CMD OPENOCD_LOAD_CMD

6
include/arch/arc/v2/linker.cmd
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@ -47,9 +47,9 @@
#endif
MEMORY {
FLASH (rx) : ORIGIN = FLASH_START, LENGTH = FLASH_SIZE
SRAM (wx) : ORIGIN = SRAM_START, LENGTH = SRAM_SIZE*1K
DCCM (wx) : ORIGIN = DCCM_START, LENGTH = DCCM_SIZE
FLASH (rx) : ORIGIN = FLASH_START, LENGTH = FLASH_SIZE*1k
SRAM (wx) : ORIGIN = SRAM_START, LENGTH = SRAM_SIZE*1k
DCCM (wx) : ORIGIN = DCCM_START, LENGTH = DCCM_SIZE*1k
}
SECTIONS {