dts: arm/riscv: gigadevice: s/gigadevice/gd

To stay consistent with other vendors, use vendor prefix (gd).

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
This commit is contained in:
Gerard Marull-Paretas 2024-01-09 09:50:44 +01:00 committed by Anas Nashif
parent b3d8fc5e82
commit 0f73e8fd3e
46 changed files with 38 additions and 38 deletions

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@ -419,7 +419,7 @@
/dts/arm/atmel/ @galak /dts/arm/atmel/ @galak
/dts/arm/broadcom/ @sbranden /dts/arm/broadcom/ @sbranden
/dts/arm/cypress/ @ifyall @npal-cy /dts/arm/cypress/ @ifyall @npal-cy
/dts/arm/gigadevice/ @nandojve /dts/arm/gd/ @nandojve
/dts/arm/infineon/xmc4* @parthitce @ifyall @npal-cy /dts/arm/infineon/xmc4* @parthitce @ifyall @npal-cy
/dts/arm/infineon/psoc6/ @ifyall @npal-cy /dts/arm/infineon/psoc6/ @ifyall @npal-cy
/dts/arm64/armv8-r.dtsi @povergoing /dts/arm64/armv8-r.dtsi @povergoing

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@ -2994,7 +2994,7 @@ GD32 Platforms:
- boards/riscv/gd32*/ - boards/riscv/gd32*/
- boards/riscv/longan_nano/ - boards/riscv/longan_nano/
- drivers/*/*gd32* - drivers/*/*gd32*
- dts/*/gigadevice/ - dts/*/gd/
- dts/bindings/*/*gd32* - dts/bindings/*/*gd32*
- soc/*/gd_gd32/ - soc/*/gd_gd32/
- scripts/west_commands/*/*gd32* - scripts/west_commands/*/*gd32*

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@ -5,7 +5,7 @@
/dts-v1/; /dts-v1/;
#include <gigadevice/gd32a50x/gd32a503vdt3.dtsi> #include <gd/gd32a50x/gd32a503vdt3.dtsi>
#include "gd32a503v_eval-pinctrl.dtsi" #include "gd32a503v_eval-pinctrl.dtsi"
/ { / {

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@ -5,7 +5,7 @@
/dts-v1/; /dts-v1/;
#include <gigadevice/gd32e10x/gd32e103vbt6.dtsi> #include <gd/gd32e10x/gd32e103vbt6.dtsi>
#include "gd32e103v_eval-pinctrl.dtsi" #include "gd32e103v_eval-pinctrl.dtsi"
#include <zephyr/dt-bindings/input/input-event-codes.h> #include <zephyr/dt-bindings/input/input-event-codes.h>

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@ -5,7 +5,7 @@
/dts-v1/; /dts-v1/;
#include <arm/gigadevice/gd32e50x/gd32e507xe.dtsi> #include <arm/gd/gd32e50x/gd32e507xe.dtsi>
#include "gd32e507v_start-pinctrl.dtsi" #include "gd32e507v_start-pinctrl.dtsi"
#include <zephyr/dt-bindings/input/input-event-codes.h> #include <zephyr/dt-bindings/input/input-event-codes.h>

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@ -5,7 +5,7 @@
/dts-v1/; /dts-v1/;
#include <arm/gigadevice/gd32e50x/gd32e507xe.dtsi> #include <arm/gd/gd32e50x/gd32e507xe.dtsi>
#include "gd32e507z_eval-pinctrl.dtsi" #include "gd32e507z_eval-pinctrl.dtsi"
#include <zephyr/dt-bindings/input/input-event-codes.h> #include <zephyr/dt-bindings/input/input-event-codes.h>

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@ -5,7 +5,7 @@
/dts-v1/; /dts-v1/;
#include <gigadevice/gd32f3x0/gd32f350rb.dtsi> #include <gd/gd32f3x0/gd32f350rb.dtsi>
#include "gd32f350r_eval-pinctrl.dtsi" #include "gd32f350r_eval-pinctrl.dtsi"
/ { / {

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@ -5,7 +5,7 @@
/dts-v1/; /dts-v1/;
#include <gigadevice/gd32f403/gd32f403zet6.dtsi> #include <gd/gd32f403/gd32f403zet6.dtsi>
#include "gd32f403z_eval-pinctrl.dtsi" #include "gd32f403z_eval-pinctrl.dtsi"
#include <zephyr/dt-bindings/input/input-event-codes.h> #include <zephyr/dt-bindings/input/input-event-codes.h>

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@ -5,7 +5,7 @@
/dts-v1/; /dts-v1/;
#include <gigadevice/gd32f4xx/gd32f407xk.dtsi> #include <gd/gd32f4xx/gd32f407xk.dtsi>
#include "gd32f407v_start-pinctrl.dtsi" #include "gd32f407v_start-pinctrl.dtsi"
#include <zephyr/dt-bindings/input/input-event-codes.h> #include <zephyr/dt-bindings/input/input-event-codes.h>

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@ -5,7 +5,7 @@
/dts-v1/; /dts-v1/;
#include <gigadevice/gd32f4xx/gd32f450xk.dtsi> #include <gd/gd32f4xx/gd32f450xk.dtsi>
#include "gd32f450i_eval-pinctrl.dtsi" #include "gd32f450i_eval-pinctrl.dtsi"
#include <zephyr/dt-bindings/input/input-event-codes.h> #include <zephyr/dt-bindings/input/input-event-codes.h>

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@ -5,7 +5,7 @@
/dts-v1/; /dts-v1/;
#include <arm/gigadevice/gd32f4xx/gd32f450xk.dtsi> #include <arm/gd/gd32f4xx/gd32f450xk.dtsi>
#include "gd32f450v_start-pinctrl.dtsi" #include "gd32f450v_start-pinctrl.dtsi"
#include <zephyr/dt-bindings/input/input-event-codes.h> #include <zephyr/dt-bindings/input/input-event-codes.h>

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@ -5,7 +5,7 @@
/dts-v1/; /dts-v1/;
#include <gigadevice/gd32f4xx/gd32f450xk.dtsi> #include <gd/gd32f4xx/gd32f450xk.dtsi>
#include "gd32f450z_eval-pinctrl.dtsi" #include "gd32f450z_eval-pinctrl.dtsi"
#include <zephyr/dt-bindings/input/input-event-codes.h> #include <zephyr/dt-bindings/input/input-event-codes.h>

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@ -5,7 +5,7 @@
/dts-v1/; /dts-v1/;
#include <gigadevice/gd32f4xx/gd32f470ik.dtsi> #include <gd/gd32f4xx/gd32f470ik.dtsi>
#include "gd32f470i_eval-pinctrl.dtsi" #include "gd32f470i_eval-pinctrl.dtsi"
#include <zephyr/dt-bindings/input/input-event-codes.h> #include <zephyr/dt-bindings/input/input-event-codes.h>

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@ -5,7 +5,7 @@
/dts-v1/; /dts-v1/;
#include <gigadevice/gd32l23x/gd32l233rc.dtsi> #include <gd/gd32l23x/gd32l233rc.dtsi>
#include "gd32l233r_eval-pinctrl.dtsi" #include "gd32l233r_eval-pinctrl.dtsi"
#include <zephyr/dt-bindings/input/input-event-codes.h> #include <zephyr/dt-bindings/input/input-event-codes.h>

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@ -5,7 +5,7 @@
/dts-v1/; /dts-v1/;
#include <gigadevice/gd32vf103Xb.dtsi> #include <gd/gd32vf103Xb.dtsi>
#include "gd32vf103c_starter-pinctrl.dtsi" #include "gd32vf103c_starter-pinctrl.dtsi"
#include <zephyr/dt-bindings/input/input-event-codes.h> #include <zephyr/dt-bindings/input/input-event-codes.h>

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@ -5,7 +5,7 @@
/dts-v1/; /dts-v1/;
#include <gigadevice/gd32vf103Xb.dtsi> #include <gd/gd32vf103Xb.dtsi>
#include "gd32vf103v_eval-pinctrl.dtsi" #include "gd32vf103v_eval-pinctrl.dtsi"
#include <zephyr/dt-bindings/input/input-event-codes.h> #include <zephyr/dt-bindings/input/input-event-codes.h>

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@ -5,7 +5,7 @@
*/ */
/dts-v1/; /dts-v1/;
#include <gigadevice/gd32vf103Xb.dtsi> #include <gd/gd32vf103Xb.dtsi>
#include "longan_nano-pinctrl.dtsi" #include "longan_nano-pinctrl.dtsi"
#include "longan_nano-common.dtsi" #include "longan_nano-common.dtsi"

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@ -5,7 +5,7 @@
*/ */
/dts-v1/; /dts-v1/;
#include <gigadevice/gd32vf103X8.dtsi> #include <gd/gd32vf103X8.dtsi>
#include "longan_nano-pinctrl.dtsi" #include "longan_nano-pinctrl.dtsi"
#include "longan_nano-common.dtsi" #include "longan_nano-common.dtsi"

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@ -5,7 +5,7 @@
*/ */
#include <mem.h> #include <mem.h>
#include <gigadevice/gd32a50x/gd32a50x.dtsi> #include <gd/gd32a50x/gd32a50x.dtsi>
&flash0 { &flash0 {
reg = <0x08000000 DT_SIZE_K(384)>; reg = <0x08000000 DT_SIZE_K(384)>;

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@ -5,7 +5,7 @@
*/ */
#include <mem.h> #include <mem.h>
#include <gigadevice/gd32e10x/gd32e10x.dtsi> #include <gd/gd32e10x/gd32e10x.dtsi>
&flash0 { &flash0 {
reg = <0x08000000 DT_SIZE_K(128)>; reg = <0x08000000 DT_SIZE_K(128)>;

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@ -5,7 +5,7 @@
*/ */
#include <mem.h> #include <mem.h>
#include <arm/gigadevice/gd32e50x/gd32e50x.dtsi> #include <arm/gd/gd32e50x/gd32e50x.dtsi>
/ { / {
soc { soc {

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@ -5,7 +5,7 @@
*/ */
#include <mem.h> #include <mem.h>
#include <gigadevice/gd32f3x0/gd32f3x0.dtsi> #include <gd/gd32f3x0/gd32f3x0.dtsi>
/ { / {
soc { soc {

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@ -5,7 +5,7 @@
*/ */
#include <mem.h> #include <mem.h>
#include <gigadevice/gd32f3x0/gd32f350.dtsi> #include <gd/gd32f3x0/gd32f350.dtsi>
&flash0 { &flash0 {
reg = <0x08000000 DT_SIZE_K(32)>; reg = <0x08000000 DT_SIZE_K(32)>;

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@ -5,7 +5,7 @@
*/ */
#include <mem.h> #include <mem.h>
#include <gigadevice/gd32f3x0/gd32f350.dtsi> #include <gd/gd32f3x0/gd32f350.dtsi>
&flash0 { &flash0 {
reg = <0x08000000 DT_SIZE_K(128)>; reg = <0x08000000 DT_SIZE_K(128)>;

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@ -5,7 +5,7 @@
*/ */
#include <mem.h> #include <mem.h>
#include <gigadevice/gd32f403/gd32f403.dtsi> #include <gd/gd32f403/gd32f403.dtsi>
&flash0 { &flash0 {
reg = <0x08000000 DT_SIZE_K(512)>; reg = <0x08000000 DT_SIZE_K(512)>;

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@ -4,7 +4,7 @@
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
*/ */
#include <gigadevice/gd32f4xx/gd32f4xx.dtsi> #include <gd/gd32f4xx/gd32f4xx.dtsi>
&cpu0 { &cpu0 {
clock-frequency = <168000000>; clock-frequency = <168000000>;

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@ -5,7 +5,7 @@
*/ */
#include <mem.h> #include <mem.h>
#include <gigadevice/gd32f4xx/gd32f405.dtsi> #include <gd/gd32f4xx/gd32f405.dtsi>
/ { / {
soc { soc {

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@ -4,7 +4,7 @@
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
*/ */
#include <gigadevice/gd32f4xx/gd32f4xx.dtsi> #include <gd/gd32f4xx/gd32f4xx.dtsi>
&cpu0 { &cpu0 {
clock-frequency = <168000000>; clock-frequency = <168000000>;

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@ -5,7 +5,7 @@
*/ */
#include <mem.h> #include <mem.h>
#include <gigadevice/gd32f4xx/gd32f407.dtsi> #include <gd/gd32f4xx/gd32f407.dtsi>
&flash0 { &flash0 {
reg = <0x08000000 DT_SIZE_K(512)>; reg = <0x08000000 DT_SIZE_K(512)>;

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@ -5,7 +5,7 @@
*/ */
#include <mem.h> #include <mem.h>
#include <gigadevice/gd32f4xx/gd32f407.dtsi> #include <gd/gd32f4xx/gd32f407.dtsi>
&flash0 { &flash0 {
reg = <0x08000000 DT_SIZE_K(1024)>; reg = <0x08000000 DT_SIZE_K(1024)>;

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@ -5,7 +5,7 @@
*/ */
#include <mem.h> #include <mem.h>
#include <gigadevice/gd32f4xx/gd32f407.dtsi> #include <gd/gd32f4xx/gd32f407.dtsi>
&flash0 { &flash0 {
reg = <0x08000000 DT_SIZE_K(3072)>; reg = <0x08000000 DT_SIZE_K(3072)>;

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@ -5,7 +5,7 @@
*/ */
#include <freq.h> #include <freq.h>
#include <gigadevice/gd32f4xx/gd32f4xx.dtsi> #include <gd/gd32f4xx/gd32f4xx.dtsi>
/ { / {
soc { soc {

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@ -5,7 +5,7 @@
*/ */
#include <mem.h> #include <mem.h>
#include <gigadevice/gd32f4xx/gd32f450.dtsi> #include <gd/gd32f4xx/gd32f450.dtsi>
&flash0 { &flash0 {
reg = <0x08000000 DT_SIZE_K(3072)>; reg = <0x08000000 DT_SIZE_K(3072)>;

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@ -4,7 +4,7 @@
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
*/ */
#include <gigadevice/gd32f4xx/gd32f450.dtsi> #include <gd/gd32f4xx/gd32f450.dtsi>
&cpu0 { &cpu0 {
clock-frequency = <DT_FREQ_M(240)>; clock-frequency = <DT_FREQ_M(240)>;

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@ -5,7 +5,7 @@
*/ */
#include <mem.h> #include <mem.h>
#include <gigadevice/gd32f4xx/gd32f470.dtsi> #include <gd/gd32f4xx/gd32f470.dtsi>
&flash0 { &flash0 {
reg = <0x08000000 DT_SIZE_K(3072)>; reg = <0x08000000 DT_SIZE_K(3072)>;

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@ -5,7 +5,7 @@
*/ */
#include <mem.h> #include <mem.h>
#include <gigadevice/gd32l23x/gd32l23x.dtsi> #include <gd/gd32l23x/gd32l23x.dtsi>
/ { / {
soc { soc {

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@ -5,7 +5,7 @@
*/ */
#include <mem.h> #include <mem.h>
#include <gigadevice/gd32vf103.dtsi> #include <gd/gd32vf103.dtsi>
&sram0 { &sram0 {
reg = <0x20000000 DT_SIZE_K(20)>; reg = <0x20000000 DT_SIZE_K(20)>;

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@ -5,7 +5,7 @@
*/ */
#include <mem.h> #include <mem.h>
#include <gigadevice/gd32vf103.dtsi> #include <gd/gd32vf103.dtsi>
&sram0 { &sram0 {
reg = <0x20000000 DT_SIZE_K(32)>; reg = <0x20000000 DT_SIZE_K(32)>;