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arch: make CONFIG_EXCEPTION_DEBUG cross arch config

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Define CONFIG_EXCEPTION_DEBUG globally and remove architecture specific
definition of config.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This commit is contained in:
Anas Nashif 2023-12-11 13:32:43 -05:00 committed by Carles Cufí
parent 1cb80d3282
commit 044e2d6bff
26 changed files with 16 additions and 54 deletions
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10
arch/Kconfig
View File

@ -514,6 +514,16 @@ config IRQ_OFFLOAD_NESTED
synchronous nested interrupt on the current CPU. Not all
hardware is capable.
config EXCEPTION_DEBUG
bool "Unhandled exception debugging"
default y
depends on PRINTK || LOG
help
Install handlers for various CPU exception/trap vectors to
make debugging them easier, at a small expense in code size.
This prints out the specific exception vector and any associated
error codes.
config EXTRA_EXCEPTION_INFO
bool "Collect extra exception info"
depends on ARCH_HAS_EXTRA_EXCEPTION_INFO

9
arch/arc/Kconfig
View File

@ -376,15 +376,6 @@ config ARC_EXCEPTION_STACK_SIZE
endmenu
config ARC_EXCEPTION_DEBUG
bool "Unhandled exception debugging information"
default n
depends on PRINTK || LOG
help
Print human-readable information about exception vectors, cause codes,
and parameters, at a cost of code/data size for the human-readable
strings.
config ARC_EARLY_SOC_INIT
bool "Make early stage SoC-specific initialization"
help

6
arch/arc/core/fatal.c
View File

@ -21,7 +21,7 @@
LOG_MODULE_DECLARE(os, CONFIG_KERNEL_LOG_LEVEL);
#ifdef CONFIG_ARC_EXCEPTION_DEBUG
#ifdef CONFIG_EXCEPTION_DEBUG
static void dump_arc_esf(const z_arch_esf_t *esf)
{
LOG_ERR(" r0: 0x%" PRIxPTR " r1: 0x%" PRIxPTR " r2: 0x%" PRIxPTR " r3: 0x%" PRIxPTR "",
@ -42,11 +42,11 @@ static void dump_arc_esf(const z_arch_esf_t *esf)
void z_arc_fatal_error(unsigned int reason, const z_arch_esf_t *esf)
{
#ifdef CONFIG_ARC_EXCEPTION_DEBUG
#ifdef CONFIG_EXCEPTION_DEBUG
if (esf != NULL) {
dump_arc_esf(esf);
}
#endif /* CONFIG_ARC_EXCEPTION_DEBUG */
#endif /* CONFIG_EXCEPTION_DEBUG */
z_fatal_error(reason, esf);
}

6
arch/arc/core/fault.c
View File

@ -104,7 +104,7 @@ static bool z_check_thread_stack_fail(const uint32_t fault_addr, uint32_t sp)
}
#endif
#ifdef CONFIG_ARC_EXCEPTION_DEBUG
#ifdef CONFIG_EXCEPTION_DEBUG
/* For EV_ProtV, the numbering/semantics of the parameter are consistent across
* several codes, although not all combination will be reported.
*
@ -335,7 +335,7 @@ static void dump_exception_info(uint32_t vector, uint32_t cause, uint32_t parame
break;
}
}
#endif /* CONFIG_ARC_EXCEPTION_DEBUG */
#endif /* CONFIG_EXCEPTION_DEBUG */
/*
* @brief Fault handler
@ -387,7 +387,7 @@ void _Fault(z_arch_esf_t *esf, uint32_t old_sp)
LOG_ERR("***** Exception vector: 0x%x, cause code: 0x%x, parameter 0x%x",
vector, cause, parameter);
LOG_ERR("Address 0x%x", exc_addr);
#ifdef CONFIG_ARC_EXCEPTION_DEBUG
#ifdef CONFIG_EXCEPTION_DEBUG
dump_exception_info(vector, cause, parameter);
#endif

9
arch/arm64/core/Kconfig
View File

@ -253,15 +253,6 @@ config ARM_MMU
help
Memory Management Unit support.
config EXCEPTION_DEBUG
bool "Unhandled exception debugging information"
default y
depends on LOG
help
Print human-readable information about exception vectors, cause codes,
and parameters, at a cost of code/data size for the human-readable
strings.
config XIP
select AARCH64_IMAGE_HEADER

10
arch/x86/Kconfig
View File

@ -292,16 +292,6 @@ config MULTIBOOT_MEMMAP
endif # MULTIBOOT
config EXCEPTION_DEBUG
bool "Unhandled exception debugging"
default y
depends on LOG
help
Install handlers for various CPU exception/trap vectors to
make debugging them easier, at a small expense in code size.
This prints out the specific exception vector and any associated
error codes.
config X86_VERY_EARLY_CONSOLE
bool "Support very early boot printk"
depends on PRINTK

1
boards/arc/nsim/nsim_em11d_defconfig
View File

@ -12,5 +12,4 @@ CONFIG_ARC_MPU_ENABLE=y
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
CONFIG_SERIAL=y
CONFIG_ARC_EXCEPTION_DEBUG=y
CONFIG_ARC_USE_UNALIGNED_MEM_ACCESS=y

1
boards/arc/nsim/nsim_em7d_v22_defconfig
View File

@ -12,5 +12,4 @@ CONFIG_ARC_MPU_ENABLE=y
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
CONFIG_SERIAL=y
CONFIG_ARC_EXCEPTION_DEBUG=y
CONFIG_ARC_USE_UNALIGNED_MEM_ACCESS=y

1
boards/arc/nsim/nsim_em_defconfig
View File

@ -12,5 +12,4 @@ CONFIG_ARC_MPU_ENABLE=y
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
CONFIG_SERIAL=y
CONFIG_ARC_EXCEPTION_DEBUG=y
CONFIG_ARC_USE_UNALIGNED_MEM_ACCESS=y

1
boards/arc/nsim/nsim_hs3x_hostlink_defconfig
View File

@ -11,5 +11,4 @@ CONFIG_ARCV2_TIMER=y
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
CONFIG_SERIAL=y
CONFIG_ARC_EXCEPTION_DEBUG=y
CONFIG_ARC_MPU_ENABLE=y

1
boards/arc/nsim/nsim_hs5x_defconfig
View File

@ -12,4 +12,3 @@ CONFIG_ARCV2_TIMER=y
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
CONFIG_SERIAL=y
CONFIG_ARC_EXCEPTION_DEBUG=y

1
boards/arc/nsim/nsim_hs5x_smp_12cores_defconfig
View File

@ -12,7 +12,6 @@ CONFIG_ARCV2_TIMER=y
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
CONFIG_SERIAL=y
CONFIG_ARC_EXCEPTION_DEBUG=y
CONFIG_SMP=y
CONFIG_MP_MAX_NUM_CPUS=12
CONFIG_TICKET_SPINLOCKS=y

1
boards/arc/nsim/nsim_hs5x_smp_defconfig
View File

@ -12,7 +12,6 @@ CONFIG_ARCV2_TIMER=y
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
CONFIG_SERIAL=y
CONFIG_ARC_EXCEPTION_DEBUG=y
CONFIG_SMP=y
CONFIG_MP_MAX_NUM_CPUS=2
CONFIG_TICKET_SPINLOCKS=y

1
boards/arc/nsim/nsim_hs6x_defconfig
View File

@ -12,4 +12,3 @@ CONFIG_ARCV2_TIMER=y
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
CONFIG_SERIAL=y
CONFIG_ARC_EXCEPTION_DEBUG=y

1
boards/arc/nsim/nsim_hs6x_smp_12cores_defconfig
View File

@ -12,7 +12,6 @@ CONFIG_ARCV2_TIMER=y
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
CONFIG_SERIAL=y
CONFIG_ARC_EXCEPTION_DEBUG=y
CONFIG_SMP=y
CONFIG_MP_MAX_NUM_CPUS=12
CONFIG_TICKET_SPINLOCKS=y

1
boards/arc/nsim/nsim_hs6x_smp_defconfig
View File

@ -12,7 +12,6 @@ CONFIG_ARCV2_TIMER=y
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
CONFIG_SERIAL=y
CONFIG_ARC_EXCEPTION_DEBUG=y
CONFIG_SMP=y
CONFIG_MP_MAX_NUM_CPUS=2
CONFIG_TICKET_SPINLOCKS=y

1
boards/arc/nsim/nsim_hs_defconfig
View File

@ -11,5 +11,4 @@ CONFIG_ARCV2_TIMER=y
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
CONFIG_SERIAL=y
CONFIG_ARC_EXCEPTION_DEBUG=y
CONFIG_ARC_MPU_ENABLE=y

1
boards/arc/nsim/nsim_hs_flash_xip_defconfig
View File

@ -11,6 +11,5 @@ CONFIG_ARCV2_TIMER=y
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
CONFIG_SERIAL=y
CONFIG_ARC_EXCEPTION_DEBUG=y
CONFIG_HARVARD=n
CONFIG_ARC_MPU_ENABLE=y

1
boards/arc/nsim/nsim_hs_mpuv6_defconfig
View File

@ -12,4 +12,3 @@ CONFIG_ARC_MPU_ENABLE=y
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
CONFIG_SERIAL=y
CONFIG_ARC_EXCEPTION_DEBUG=y

1
boards/arc/nsim/nsim_hs_smp_defconfig
View File

@ -11,7 +11,6 @@ CONFIG_ARCV2_TIMER=y
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
CONFIG_SERIAL=y
CONFIG_ARC_EXCEPTION_DEBUG=y
CONFIG_SMP=y
CONFIG_MP_MAX_NUM_CPUS=2
CONFIG_TICKET_SPINLOCKS=y

1
boards/arc/nsim/nsim_hs_sram_defconfig
View File

@ -11,6 +11,5 @@ CONFIG_ARCV2_TIMER=y
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
CONFIG_SERIAL=y
CONFIG_ARC_EXCEPTION_DEBUG=y
CONFIG_HARVARD=n
CONFIG_ARC_MPU_ENABLE=y

1
boards/arc/nsim/nsim_sem_defconfig
View File

@ -12,5 +12,4 @@ CONFIG_ARC_MPU_ENABLE=y
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
CONFIG_SERIAL=y
CONFIG_ARC_EXCEPTION_DEBUG=y
CONFIG_TRUSTED_EXECUTION_SECURE=y

1
boards/arc/nsim/nsim_sem_mpu_stack_guard_defconfig
View File

@ -13,5 +13,4 @@ CONFIG_ARC_MPU_ENABLE=y
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
CONFIG_SERIAL=y
CONFIG_ARC_EXCEPTION_DEBUG=y
CONFIG_TRUSTED_EXECUTION_SECURE=y

1
boards/arc/nsim/nsim_vpx5_defconfig
View File

@ -11,4 +11,3 @@ CONFIG_ARCV2_TIMER=y
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
CONFIG_SERIAL=y
CONFIG_ARC_EXCEPTION_DEBUG=y

1
samples/boards/arc_secure_services/nsim_sem_normal_defconfig
View File

@ -10,5 +10,4 @@ CONFIG_ARCV2_TIMER=y
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
CONFIG_SERIAL=y
CONFIG_ARC_EXCEPTION_DEBUG=y
CONFIG_TRUSTED_EXECUTION_NONSECURE=y

1
tests/arch/x86/pagetables/prj.conf
View File

@ -1,5 +1,4 @@
CONFIG_ZTEST=y
CONFIG_TEST_HW_STACK_PROTECTION=n
CONFIG_TEST_USERSPACE=y
CONFIG_EXCEPTION_DEBUG=y
CONFIG_APPLICATION_DEFINED_SYSCALL=y