From 03227c3520b20f8008354bb88ac90d42e041bf72 Mon Sep 17 00:00:00 2001 From: Steven Chang Date: Fri, 27 Jun 2025 15:25:18 +0800 Subject: [PATCH] drivers: watchdog: watchdog driver Add watchdog driver for ENE KB106X Signed-off-by: Steven Chang --- drivers/watchdog/CMakeLists.txt | 1 + drivers/watchdog/Kconfig.ene | 7 + drivers/watchdog/wdt_ene_kb106x.c | 181 ++++++++++++++++++ dts/arm/ene/kb106x/kb106x.dtsi | 7 + .../watchdog/ene,kb106x-watchdog.yaml | 15 ++ soc/ene/kb106x/common/reg/wdt.h | 41 ++++ 6 files changed, 252 insertions(+) create mode 100644 drivers/watchdog/wdt_ene_kb106x.c create mode 100644 dts/bindings/watchdog/ene,kb106x-watchdog.yaml create mode 100644 soc/ene/kb106x/common/reg/wdt.h diff --git a/drivers/watchdog/CMakeLists.txt b/drivers/watchdog/CMakeLists.txt index e247de4e9fe..ab7dcabedc5 100644 --- a/drivers/watchdog/CMakeLists.txt +++ b/drivers/watchdog/CMakeLists.txt @@ -51,6 +51,7 @@ zephyr_library_sources_ifdef(CONFIG_WDT_OPENTITAN wdt_opentitan.c) zephyr_library_sources_ifdef(CONFIG_WDT_AMBIQ wdt_ambiq.c) zephyr_library_sources_ifdef(CONFIG_WDT_XMC4XXX wdt_xmc4xxx.c) zephyr_library_sources_ifdef(CONFIG_WWDT_NUMAKER wdt_wwdt_numaker.c) +zephyr_library_sources_ifdef(CONFIG_WDT_ENE_KB106X wdt_ene_kb106x.c) zephyr_library_sources_ifdef(CONFIG_WDT_ENE_KB1200 wdt_ene_kb1200.c) zephyr_library_sources_ifdef(CONFIG_WDT_IWDG_WCH wdt_iwdg_wch.c) diff --git a/drivers/watchdog/Kconfig.ene b/drivers/watchdog/Kconfig.ene index 425b5bb63ac..eb2f61192b0 100644 --- a/drivers/watchdog/Kconfig.ene +++ b/drivers/watchdog/Kconfig.ene @@ -8,3 +8,10 @@ config WDT_ENE_KB1200 select HAS_WDT_DISABLE_AT_BOOT help This option enables the KB1200 watchdog driver. + +config WDT_ENE_KB106X + bool "ENE KB106X watchdog driver" + default y + depends on DT_HAS_ENE_KB106X_WATCHDOG_ENABLED + help + This option enables the KB106X watchdog driver. diff --git a/drivers/watchdog/wdt_ene_kb106x.c b/drivers/watchdog/wdt_ene_kb106x.c new file mode 100644 index 00000000000..706d9e3c706 --- /dev/null +++ b/drivers/watchdog/wdt_ene_kb106x.c @@ -0,0 +1,181 @@ +/* + * Copyright (c) 2025 ENE Technology Inc. + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#define DT_DRV_COMPAT ene_kb106x_watchdog + +#include +#include +#include +#include +#include + +#include + +LOG_MODULE_REGISTER(ene_kb106x_wdt, CONFIG_WDT_LOG_LEVEL); + +/* Device config */ +struct wdt_kb106x_config { + struct wdt_regs *wdt; +}; + +/* Device data */ +struct wdt_kb106x_data { + wdt_callback_t cb; + bool timeout_installed; +}; + +/* WDT api functions */ +static int wdt_kb106x_setup(const struct device *dev, uint8_t options) +{ + struct wdt_kb106x_config const *cfg = dev->config; + struct wdt_kb106x_data *data = dev->data; + + if (!data->timeout_installed) { + LOG_ERR("No valid WDT timeout installed"); + return -EINVAL; + } + if (options & WDT_OPT_PAUSE_HALTED_BY_DBG) { + LOG_ERR("WDT_OPT_PAUSE_HALTED_BY_DBG is not supported"); + return -ENOTSUP; + } + + /* Setting Clock Source */ + if (options & WDT_OPT_PAUSE_IN_SLEEP) { + cfg->wdt->WDTCFG = WDT_ADCO32K; + } else { + cfg->wdt->WDTCFG = WDT_PHER32K; + } + /* Clear Pending Flag */ + cfg->wdt->WDTPF = (WDT_HALF_WAY_EVENT | WDT_RESET_EVENT); + /* WDT enable */ + cfg->wdt->WDTCFG |= WDT_FUNCTON_ENABLE; + + return 0; +} + +static int wdt_kb106x_disable(const struct device *dev) +{ + struct wdt_kb106x_config const *cfg = dev->config; + struct wdt_kb106x_data *data = dev->data; + + if (!(cfg->wdt->WDTCFG & WDT_FUNCTON_ENABLE)) { + LOG_ERR("wdt is not enabled"); + return -EALREADY; + } + /* WDT disable, write bit 7~4 = 1001b */ + cfg->wdt->WDTCFG = (cfg->wdt->WDTCFG & ~WDT_FUNCTON_ENABLE) | WDT_DISABLE_PASSWORD; + /* Clear Pending Flag */ + cfg->wdt->WDTPF = (WDT_HALF_WAY_EVENT | WDT_RESET_EVENT); + /* Need disable IE,or the wdt-half-event interrupt will be entered */ + cfg->wdt->WDTIE &= ~WDT_HALF_WAY_EVENT; + data->timeout_installed = false; + + return 0; +} + +static int wdt_kb106x_install_timeout(const struct device *dev, + const struct wdt_timeout_cfg *config) +{ + struct wdt_kb106x_config const *cfg = dev->config; + struct wdt_kb106x_data *data = dev->data; + + /* Watchdog Counter Match Value */ + if (config->window.min > 0U) { + data->timeout_installed = false; + LOG_ERR("wdt not support window, window.min need set 0"); + return -EINVAL; + } + cfg->wdt->WDTM = (config->window.max * 1000) / WDT_TICK_TIME_US; + /* (HW design) The counter match value must be >= 3 */ + if (cfg->wdt->WDTM < WDT_MIN_CNT) { + data->timeout_installed = false; + LOG_ERR("wdt timeout value below the hw min value"); + return -EINVAL; + } + + /* Watchdog behavior flags */ + if ((config->flags & WDT_FLAG_RESET_MASK) == WDT_FLAG_RESET_SOC) { + /* Reset: SoC */ + cfg->wdt->WDTCFG_T = WDT_RESET_WHOLE_CHIP_WO_GPIO; + } else if ((config->flags & WDT_FLAG_RESET_MASK) == WDT_FLAG_RESET_CPU_CORE) { + /* Reset: CPU core */ + cfg->wdt->WDTCFG_T = WDT_RESET_WHOLE_CHIP; + } else { + /* Reset: none */ + cfg->wdt->WDTCFG_T = WDT_RESET_ONLY_MCU; + } + + /* Watchdog callback function */ + data->cb = config->callback; + if (data->cb) { + cfg->wdt->WDTIE |= WDT_HALF_WAY_EVENT; + } else { + /* If the callback function is NULL,the SoC will be reset directly. + * But still need enable interrupt. + */ + cfg->wdt->WDTIE |= WDT_HALF_WAY_EVENT; + } + data->timeout_installed = true; + /* clear fw scratch register */ + cfg->wdt->WDTSCR[0] = 0; + return 0; +} + +static int wdt_kb106x_feed(const struct device *dev, int channel_id) +{ + struct wdt_kb106x_config const *cfg = dev->config; + + if (!(cfg->wdt->WDTCFG & WDT_FUNCTON_ENABLE)) { + LOG_ERR("wdt is not enabled"); + return -EINVAL; + } + /* fw scratch register */ + cfg->wdt->WDTSCR[0] = (uint8_t)channel_id; + /* Re-enable to reset counter */ + cfg->wdt->WDTCFG |= WDT_FUNCTON_ENABLE; + /* Clear Pending Flag */ + cfg->wdt->WDTPF = WDT_HALF_WAY_EVENT; + + return 0; +} + +static void wdt_kb106x_isr(const struct device *dev) +{ + struct wdt_kb106x_data *data = dev->data; + + if (data->cb) { + data->cb(dev, 0); + } +} + +static DEVICE_API(wdt, wdt_kb106x_api) = { + .setup = wdt_kb106x_setup, + .disable = wdt_kb106x_disable, + .install_timeout = wdt_kb106x_install_timeout, + .feed = wdt_kb106x_feed, +}; + +static int wdt_kb106x_init(const struct device *dev) +{ + if (IS_ENABLED(CONFIG_WDT_DISABLE_AT_BOOT)) { + wdt_kb106x_disable(dev); + } + + IRQ_CONNECT(DT_INST_IRQN(0), DT_INST_IRQ(0, priority), wdt_kb106x_isr, + DEVICE_DT_INST_GET(0), 0); + irq_enable(DT_INST_IRQN(0)); + + return 0; +} + +static const struct wdt_kb106x_config wdt_kb106x_config = { + .wdt = (struct wdt_regs *)DT_INST_REG_ADDR(0), +}; + +static struct wdt_kb106x_data wdt_kb106x_dev_data; + +DEVICE_DT_INST_DEFINE(0, wdt_kb106x_init, NULL, &wdt_kb106x_dev_data, &wdt_kb106x_config, + PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEVICE, &wdt_kb106x_api); diff --git a/dts/arm/ene/kb106x/kb106x.dtsi b/dts/arm/ene/kb106x/kb106x.dtsi index 2b616f23b3a..a95ecc04963 100644 --- a/dts/arm/ene/kb106x/kb106x.dtsi +++ b/dts/arm/ene/kb106x/kb106x.dtsi @@ -157,6 +157,13 @@ #pwm-cells = <3>; status = "disabled"; }; + + wdt0: watchdog@40060000 { + compatible = "ene,kb106x-watchdog"; + reg = <0x40060000 0x100>; + interrupts = <0 0>; + status = "disabled"; + }; }; }; diff --git a/dts/bindings/watchdog/ene,kb106x-watchdog.yaml b/dts/bindings/watchdog/ene,kb106x-watchdog.yaml new file mode 100644 index 00000000000..fae1941affc --- /dev/null +++ b/dts/bindings/watchdog/ene,kb106x-watchdog.yaml @@ -0,0 +1,15 @@ +# Copyright (c) 2025 ENE Technology Inc. +# SPDX-License-Identifier: Apache-2.0 + +description: ENE watchdog timer + +include: [base.yaml] + +compatible: "ene,kb106x-watchdog" + +properties: + reg: + required: true + + interrupts: + required: true diff --git a/soc/ene/kb106x/common/reg/wdt.h b/soc/ene/kb106x/common/reg/wdt.h new file mode 100644 index 00000000000..17ebb53346e --- /dev/null +++ b/soc/ene/kb106x/common/reg/wdt.h @@ -0,0 +1,41 @@ +/* + * Copyright (c) 2025 ENE Technology Inc. + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#ifndef ENE_KB106X_WDT_H +#define ENE_KB106X_WDT_H + +/** + * Structure type to access Watch Dog Timer (WDT). + */ +struct wdt_regs { + volatile uint8_t WDTCFG; /*Configuration Register */ + volatile uint8_t WDTCFG_T; /*Configuration Reset Type Register */ + volatile uint16_t Reserved0; /*Reserved */ + volatile uint8_t WDTIE; /*Interrupt Enable Register */ + volatile uint8_t Reserved1[3]; /*Reserved */ + volatile uint8_t WDTPF; /*Event Pending Flag Register */ + volatile uint8_t Reserved2[3]; /*Reserved */ + volatile uint16_t WDTM; /*WDT Match Value Register */ + volatile uint16_t Reserved3; /*Reserved */ + volatile uint8_t WDTSCR[4]; /*FW Scratch(4 bytes) Register */ +}; + +#define WDT_MIN_CNT 3U +#define WDT_TICK_TIME_US 31250 + +#define WDT_RESET_WHOLE_CHIP_WO_GPIO 0 +#define WDT_RESET_WHOLE_CHIP 1 +#define WDT_RESET_ONLY_MCU 2 + +#define WDT_DISABLE_PASSWORD 0x90 +#define WDT_ADCO32K 0x00 +#define WDT_PHER32K 0x02 +#define WDT_FUNCTON_ENABLE 0x01 + +#define WDT_HALF_WAY_EVENT 0x01 +#define WDT_RESET_EVENT 0x02 + +#endif /* ENE_KB106X_WDT_H */