From 013f6f40396e6b5ecae047f175ef204708560fc2 Mon Sep 17 00:00:00 2001 From: Andre Morishita Date: Wed, 7 May 2025 09:48:00 -0300 Subject: [PATCH] boards: variscite: imx8mp_var_som: Update index.rst Update Cortex-M7 DDR address in memory mapping table to 0x7B000000. Signed-off-by: Andre Morishita --- boards/variscite/imx8mp_var_som/doc/index.rst | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/boards/variscite/imx8mp_var_som/doc/index.rst b/boards/variscite/imx8mp_var_som/doc/index.rst index 6bd3652e670..00e2a88c108 100644 --- a/boards/variscite/imx8mp_var_som/doc/index.rst +++ b/boards/variscite/imx8mp_var_som/doc/index.rst @@ -148,7 +148,7 @@ supported: ITCM and DDR). These are the memory mapping for A53 and M7: +------------+-------------------------+------------------------+-----------------------+----------------------+ | OCRAM_S | 0x00180000-0x00188FFF | 0x20180000-0x20188FFF | 0x00180000-0x00188FFF | 36KB | +------------+-------------------------+------------------------+-----------------------+----------------------+ -| DDR | 0x80000000-0x803FFFFF | 0x7E200000-0x7E3FFFFF | 0x7E000000-0x7E1FFFFF | 2MB | +| DDR | 0x80000000-0x803FFFFF | 0x7B200000-0x7B3FFFFF | 0x7B000000-0x7B1FFFFF | 2MB | +------------+-------------------------+------------------------+-----------------------+----------------------+ For more information about memory mapping see the