From 00e9195f45f9541219bf8ef23abbd4b7d46433ee Mon Sep 17 00:00:00 2001
From: Francois Ramu <francois.ramu@st.com>
Date: Mon, 30 Sep 2024 15:34:02 +0200
Subject: [PATCH] boards: st: nucleo_h7s3l78 nucleo144 board

Add the nucleo_h7s3l8 board from STMicroelectronics
This Nucleo 144 board has stm32h7s3L8 mcu.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
---
 boards/st/nucleo_h7s3l8/Kconfig.defconfig     |  16 +
 boards/st/nucleo_h7s3l8/Kconfig.nucleo_h7s3l8 |   5 +
 .../nucleo_h7s3l8/arduino_r3_connector.dtsi   |  39 +++
 boards/st/nucleo_h7s3l8/board.cmake           |  10 +
 boards/st/nucleo_h7s3l8/board.yml             |   6 +
 .../nucleo_h7s3l8/doc/img/nucleo_h7s3l8.webp  | Bin 0 -> 33932 bytes
 boards/st/nucleo_h7s3l8/doc/index.rst         | 324 ++++++++++++++++++
 boards/st/nucleo_h7s3l8/nucleo_h7s3l8.dts     | 141 ++++++++
 boards/st/nucleo_h7s3l8/nucleo_h7s3l8.yaml    |  15 +
 .../st/nucleo_h7s3l8/nucleo_h7s3l8_defconfig  |  21 ++
 boards/st/nucleo_h7s3l8/support/openocd.cfg   |  42 +++
 11 files changed, 619 insertions(+)
 create mode 100644 boards/st/nucleo_h7s3l8/Kconfig.defconfig
 create mode 100644 boards/st/nucleo_h7s3l8/Kconfig.nucleo_h7s3l8
 create mode 100644 boards/st/nucleo_h7s3l8/arduino_r3_connector.dtsi
 create mode 100644 boards/st/nucleo_h7s3l8/board.cmake
 create mode 100644 boards/st/nucleo_h7s3l8/board.yml
 create mode 100644 boards/st/nucleo_h7s3l8/doc/img/nucleo_h7s3l8.webp
 create mode 100644 boards/st/nucleo_h7s3l8/doc/index.rst
 create mode 100644 boards/st/nucleo_h7s3l8/nucleo_h7s3l8.dts
 create mode 100644 boards/st/nucleo_h7s3l8/nucleo_h7s3l8.yaml
 create mode 100644 boards/st/nucleo_h7s3l8/nucleo_h7s3l8_defconfig
 create mode 100644 boards/st/nucleo_h7s3l8/support/openocd.cfg

diff --git a/boards/st/nucleo_h7s3l8/Kconfig.defconfig b/boards/st/nucleo_h7s3l8/Kconfig.defconfig
new file mode 100644
index 00000000000..fdb5f99d840
--- /dev/null
+++ b/boards/st/nucleo_h7s3l8/Kconfig.defconfig
@@ -0,0 +1,16 @@
+# STM32H7S3L8 NUCLEO board configuration
+#
+# Copyright (c) 2024 STMicroelectronics
+#
+# SPDX-License-Identifier: Apache-2.0
+
+if BOARD_NUCLEO_H7S3L8
+
+if NETWORKING
+
+config NET_L2_ETHERNET
+	default y
+
+endif # NETWORKING
+
+endif # BOARD_NUCLEO_H7S3L8
diff --git a/boards/st/nucleo_h7s3l8/Kconfig.nucleo_h7s3l8 b/boards/st/nucleo_h7s3l8/Kconfig.nucleo_h7s3l8
new file mode 100644
index 00000000000..ef9af59919b
--- /dev/null
+++ b/boards/st/nucleo_h7s3l8/Kconfig.nucleo_h7s3l8
@@ -0,0 +1,5 @@
+# Copyright (c) 2024 STMicroelectronics
+# SPDX-License-Identifier: Apache-2.0
+
+config BOARD_NUCLEO_H7S3L8
+	select SOC_STM32H7S3XX
diff --git a/boards/st/nucleo_h7s3l8/arduino_r3_connector.dtsi b/boards/st/nucleo_h7s3l8/arduino_r3_connector.dtsi
new file mode 100644
index 00000000000..13e390200fd
--- /dev/null
+++ b/boards/st/nucleo_h7s3l8/arduino_r3_connector.dtsi
@@ -0,0 +1,39 @@
+/*
+ * Copyright (c) 2024 STMicroelectronics
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/ {
+	arduino_header: connector {
+		compatible = "arduino-header-r3";
+		#gpio-cells = <2>;
+		gpio-map-mask = <0xffffffff 0xffffffc0>;
+		gpio-map-pass-thru = <0 0x3f>;
+		gpio-map = <0 0 &gpioa 3 0>,	/* A0 */
+			   <1 0 &gpioc 0 0>,	/* A1 */
+			   <2 0 &gpioc 3 0>,	/* A2 */
+			   <3 0 &gpioc 4 0>,	/* A3 */
+			   <4 0 &gpioc 5 0>,	/* A4 */
+			   <5 0 &gpiof 11 0>,	/* A5 */
+			   <6 0 &gpioa 10 0>,	/* D0 */
+			   <7 0 &gpiob 14 0>,	/* D1 */
+			   <8 0 &gpiof 15 0>,	/* D2 */
+			   <9 0 &gpioe 13 0>,	/* D3 */
+			   <10 0 &gpiof 3 0>,	/* D4 */
+			   <11 0 &gpioe 11 0>,	/* D5 */
+			   <12 0 &gpioe 9 0>,	/* D6 */
+			   <13 0 &gpiof 4 0>,	/* D7 */
+			   <14 0 &gpiof 5 0>,	/* D8 */
+			   <15 0 &gpiod 15 0>,	/* D9 */
+			   <16 0 &gpiod 14 0>,	/* D10 */
+			   <17 0 &gpiob 5 0>,	/* D11 */
+			   <18 0 &gpioa 6 0>,	/* D12 */
+			   <19 0 &gpioa 5 0>,	/* D13 */
+			   <20 0 &gpiob 9 0>,	/* D14 */
+			   <21 0 &gpiob 8 0>;	/* D15 */
+	};
+};
+
+arduino_i2c: &i2c1 {};
+arduino_spi: &spi1 {};
+arduino_serial: &usart1 {};
diff --git a/boards/st/nucleo_h7s3l8/board.cmake b/boards/st/nucleo_h7s3l8/board.cmake
new file mode 100644
index 00000000000..6c18b45b35e
--- /dev/null
+++ b/boards/st/nucleo_h7s3l8/board.cmake
@@ -0,0 +1,10 @@
+# SPDX-License-Identifier: Apache-2.0
+
+# keep first
+board_runner_args(stm32cubeprogrammer "--port=swd" "--reset-mode=hw")
+
+board_runner_args(openocd --target-handle=_CHIPNAME.cpu0)
+
+# keep first
+include(${ZEPHYR_BASE}/boards/common/stm32cubeprogrammer.board.cmake)
+include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
diff --git a/boards/st/nucleo_h7s3l8/board.yml b/boards/st/nucleo_h7s3l8/board.yml
new file mode 100644
index 00000000000..6d71cded43f
--- /dev/null
+++ b/boards/st/nucleo_h7s3l8/board.yml
@@ -0,0 +1,6 @@
+board:
+  name: nucleo_h7s3l8
+  full_name: Nucleo H7S3L8
+  vendor: st
+  socs:
+    - name: stm32h7s3xx
diff --git a/boards/st/nucleo_h7s3l8/doc/img/nucleo_h7s3l8.webp b/boards/st/nucleo_h7s3l8/doc/img/nucleo_h7s3l8.webp
new file mode 100644
index 0000000000000000000000000000000000000000..af2535e26b253e79c3cb5e4e67f5fa93126613a8
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diff --git a/boards/st/nucleo_h7s3l8/doc/index.rst b/boards/st/nucleo_h7s3l8/doc/index.rst
new file mode 100644
index 00000000000..e869bcbe9ca
--- /dev/null
+++ b/boards/st/nucleo_h7s3l8/doc/index.rst
@@ -0,0 +1,324 @@
+.. _nucleo_h7s3l8_board:
+
+ST Nucleo H7S3L8
+################
+
+Overview
+********
+
+The STM32 Nucleo-144 board provides an affordable and flexible way for users
+to try out new concepts and build prototypes by choosing from the various combinations
+of performance and power consumption features, provided by the STM32 microcontroller.
+
+The ST Zio connector, which extends the ARDUINO® Uno V3 connectivity, and
+the ST morpho headers provide an easy means of expanding the functionality of the Nucleo
+open development platform with a wide choice of specialized shields.
+The STM32 Nucleo-144 board does not require any separate probe as it integrates
+the ST-LINK V3 debugger/programmer.
+
+The STM32 Nucleo-144 board comes with the STM32 comprehensive free software
+libraries and examples available with the STM32Cube MCU Package.
+
+Key Features
+
+- STM32 microcontroller with 64Kbytes of flash and 620Kbytes of RAM in TFBGA225 package
+- Ethernet compliant with IEEE-802.3-2002
+- USB USB Device only, USB OTG full speed, or SNK/UFP (full-speed or high-speed mode)
+- 3 user LEDs
+- 2 user and reset push-buttons
+- 32.768 kHz crystal oscillator
+- Board connectors:
+
+ - USB with Micro-AB or USB Type-C®
+ - Ethernet RJ45
+ - MIPI20 compatible connector with trace signals
+
+- Flexible power-supply options: ST-LINK USB VBUS or external sources
+- External or internal SMPS to generate Vcore logic supply
+- On-board ST-LINK/V3 debugger/programmer with USB re-enumeration
+- capability: mass storage, virtual COM port and debug port
+
+
+.. image:: img/nucleo_h7s3l8.webp
+   :align: center
+   :alt: Nucleo H7S3L8
+
+More information about the board can be found at the `Nucleo H7S3L8 website`_.
+
+Hardware
+********
+
+Nucleo H7S3L8 provides the following hardware components:
+
+The STM32H7S7xx devices are a high-performance microcontrollers family (STM32H7
+Series) based on the high-performance Arm |reg| Cortex |reg|-M7 32-bit RISC core.
+They operate at a frequency of up to 500 MHz.
+
+- Core: ARM |reg| 32-bit Cortex |reg| -M7 CPU with TrustZone |reg| and FPU.
+- Performance benchmark:
+
+  - 1284 DMPIS/MHz (Dhrystone 2.1)
+
+- Security
+
+  - Arm |reg| TrustZone |reg| with ARMv8-M mainline security extension
+  - Up to 8 configurable SAU regions
+  - TrustZone |reg| aware and securable peripherals
+  - Flexible lifecycle scheme with secure debug authentication
+  - Preconfigured immutable root of trust (ST-iROT)
+  - SFI (secure firmware installation)
+  - Secure data storage with hardware unique key (HUK)
+  - Secure firmware upgrade support with TF-M
+  - 2x AES coprocessors including one with DPA resistance
+  - Public key accelerator, DPA resistant
+  - On-the-fly decryption of Octo-SPI external memories
+  - HASH hardware accelerator
+  - True random number generator, NIST SP800-90B compliant
+  - 96-bit unique ID
+  - Active tampers
+  - True Random Number Generator (RNG) NIST SP800-90B compliant
+
+- Clock management:
+
+  - 24 MHz crystal oscillator (HSE)
+  - 32768 Hz crystal oscillator for RTC (LSE)
+  - Internal 64 MHz (HSI) trimmable by software
+  - Internal low-power 32 kHz RC (LSI)( |plusminus| 5%)
+  - Internal 4 MHz oscillator (CSI), trimmable by software
+  - Internal 48 MHz (HSI48) with recovery system
+  - 3 PLLs for system clock, USB, audio, ADC
+
+- Power management
+
+  - Embedded regulator (LDO) with three configurable range output to supply the digital circuitry
+
+
+- RTC with HW calendar, alarms and calibration
+- Up to 152 fast I/Os, most 5 V-tolerant, up to 10 I/Os with independent supply down to 1.08 V
+- Up to 16 timers and 2 watchdogs
+
+  - 16x 16-bit
+  - 4x 32-bit timers with up to 4 IC/OC/PWM or pulse counter and quadrature (incremental) encoder input
+  - 5x 16-bit low-power 16-bit timers (available in Stop mode)
+  - 2x watchdogs
+  - 1x SysTick timer
+
+- Memories
+
+  - Up to 64KB Flash, 2 banks read-while-write
+  - 1 Kbyte OTP (one-time programmable)
+  - 640 KB of SRAM including 64 KB with hardware parity check and 320 Kbytes with flexible ECC
+  - 4 Kbytes of backup SRAM available in the lowest power modes
+  - Flexible external memory controller with up to 16-bit data bus: SRAM, PSRAM, FRAM, SDRAM/LPSDR SDRAM, NOR/NAND memories
+  - 2x OCTOSPI memory interface with on-the-fly decryption and support for serial PSRAM/NAND/NOR, Hyper RAM/Flash frame formats
+  - 1x HEXASPI memory interface with on-the-fly decryption and support for serial PSRAM/NAND/NOR, Hyper RAM/Flash frame formats
+  - 2x SD/SDIO/MMC interfaces
+
+- Rich analog peripherals (independent supply)
+
+  - 2x 12-bit ADC with up to 5 MSPS in 12-bit
+  - 1x Digital temperature sensor
+
+- 35x communication interfaces
+
+  - 1x USB Type-C / USB power-delivery controller
+  - 1x USB OTG full-speed with PHY
+  - 1x USB OTG high-speed with PHY
+  - 3x I2C FM+ interfaces (SMBus/PMBus)
+  - 1x I3C interface
+  - 7x U(S)ARTS (ISO7816 interface, LIN, IrDA, modem control)
+  - 2x LP UART
+  - 6x SPIs including 3 muxed with full-duplex I2S
+  - 2x SAI
+  - 2x FDCAN
+  - 2x SD/SDIO/MMC interface
+  - 2x 16 channel DMA controllers
+  - 1x 8- to 16- bit camera interface
+  - 1x HDMI-CEC
+  - 1x Ethernel MAC interface with DMA controller
+  - 1x 16-bit parallel slave synchronous-interface
+  - 1x SPDIF-IN interface
+  - 1x MDIO slave interface
+
+- CORDIC for trigonometric functions acceleration
+- FMAC (filter mathematical accelerator)
+- CRC calculation unit
+- Development support: serial wire debug (SWD), JTAG, Embedded Trace Macrocell |trade|
+
+
+
+More information about STM32H7S3 can be found here:
+
+- `STM32H7S3L8 on www.st.com`_
+- `STM32H7Sx reference manual`_
+
+
+Supported Features
+==================
+
+The Zephyr ``nucleo_h7s3l8`` board target supports the following hardware
+features:
+
++-------------+------------+-------------------------------------+
+| Interface   | Controller | Driver/Component                    |
++=============+============+=====================================+
+| NVIC        | on-chip    | nested vector interrupt controller  |
++-------------+------------+-------------------------------------+
+| UART        | on-chip    | serial port                         |
++-------------+------------+-------------------------------------+
+| PINMUX      | on-chip    | pinmux                              |
++-------------+------------+-------------------------------------+
+| GPIO        | on-chip    | gpio                                |
++-------------+------------+-------------------------------------+
+| RTC         | on-chip    | counter                             |
++-------------+------------+-------------------------------------+
+| I2C         | on-chip    | i2c                                 |
++-------------+------------+-------------------------------------+
+| SPI         | on-chip    | spi                                 |
++-------------+------------+-------------------------------------+
+| PWM         | on-chip    | pwm                                 |
++-------------+------------+-------------------------------------+
+| RNG         | on-chip    | True Random number generator        |
++-------------+------------+-------------------------------------+
+| Backup SRAM | on-chip    | Backup SRAM                         |
++-------------+------------+-------------------------------------+
+| RTC         | on-chip    | rtc                                 |
++-------------+------------+-------------------------------------+
+
+Other hardware features are not yet supported on this Zephyr port.
+
+The default configuration can be found in the defconfig files:
+:zephyr_file:`boards/st/nucleo_h7s3l8/nucleo_h7s3l8_defconfig`
+
+For more details please refer to `STM32H7R/S Nucleo-144 board User Manual`_.
+
+Default Zephyr Peripheral Mapping:
+----------------------------------
+
+The Nucleo H7S3L8 board features a ST Zio connector (extended Arduino Uno V3)
+and a ST morpho connector. Board is configured as follows:
+
+- UART_3 TX/RX : PD8/PD9 (ST-Link Virtual Port Com)
+- USER_PB : PC13
+- LD1 : PD10
+- LD2 : PD13
+- LD3 : PB7
+- I2C : PB8, PB9
+- SPI1 NSS/SCK/MISO/MOSI : PD14PA5/PA6/PB5 (Arduino SPI)
+
+System Clock
+------------
+
+Nucleo H7S3L8 System Clock could be driven by an internal or external
+oscillator, as well as the main PLL clock. By default, the System clock is
+driven by the PLL clock at 600MHz, driven by an 24MHz high-speed external clock.
+
+Serial Port
+-----------
+
+Nucleo H7S3L8 board has 4 UARTs and 3 USARTs plus one LowPower UART. The Zephyr console
+output is assigned to UART3. Default settings are 115200 8N1.
+
+Backup SRAM
+-----------
+
+In order to test backup SRAM you may want to disconnect VBAT from VDD. You can
+do it by removing ``SB13`` jumper on the back side of the board.
+
+Programming and Debugging
+*************************
+
+Nucleo H7S3L8 board includes an ST-LINK/V3 embedded debug tool interface.
+
+.. note::
+
+   Check if your ST-LINK V3 has newest FW version. It can be done with `STM32CubeProgrammer`_
+
+Flashing
+========
+
+The board is configured to be flashed using west `STM32CubeProgrammer`_ runner,
+so its :ref:`installation <stm32cubeprog-flash-host-tools>` is required.
+
+Alternatively, OpenOCD or JLink can also be used to flash the board using
+the ``--runner`` (or ``-r``) option:
+
+.. code-block:: console
+
+   $ west flash --runner openocd
+
+Flashing an application to Nucleo H7S3L8
+----------------------------------------
+
+First, connect the NUCLEO-H7S3L8 to your host computer using
+the USB port to prepare it for flashing. Then build and flash your application.
+
+Here is an example for the :zephyr:code-sample:`hello_world` application.
+
+Run a serial host program to connect with your NUCLEO-H7S3L8 board.
+
+.. code-block:: console
+
+   $ minicom -b 115200 -D /dev/ttyACM0
+
+or use screen:
+
+.. code-block:: console
+
+   $ screen /dev/ttyACM0 115200
+
+Build and flash the application:
+
+.. zephyr-app-commands::
+   :zephyr-app: samples/hello_world
+   :board: nucleo_h7s3l8
+   :goals: build flash
+
+You should see the following message on the console:
+
+.. code-block:: console
+
+   $ Hello World! nucleo_h7s3l8
+
+Blinky example can also be used:
+
+.. zephyr-app-commands::
+   :zephyr-app: samples/basic/blinky
+   :board: nucleo_h7s3l8
+   :goals: build flash
+
+Debugging
+=========
+
+You can debug an application in the usual way.  Here is an example for the
+:zephyr:code-sample:`hello_world` application.
+
+.. zephyr-app-commands::
+   :zephyr-app: samples/hello_world
+   :board: nucleo_h7s3l8
+   :maybe-skip-config:
+   :goals: debug
+
+.. _Nucleo H7S3L8 website:
+   https://www.st.com/en/evaluation-tools/nucleo-h7s3l8.html
+
+.. _STM32H7R/S Nucleo-144 board User Manual:
+   https://www.st.com/resource/en/user_manual/um3276-stm32h7rx7sx-nucleo144-board-mb1737-stmicroelectronics.pdf
+
+.. _STM32H7S3L8 on www.st.com:
+   https://www.st.com/en/microcontrollers-microprocessors/stm32h7s3l8.html
+
+.. _STM32H7Sx reference manual:
+   https://www.st.com/resource/en/reference_manual/rm0477-stm32h7rx7sx-armbased-32bit-mcus-stmicroelectronics.pdf
+
+.. _OpenOCD installing Debug Version:
+   https://github.com/zephyrproject-rtos/openocd
+
+.. _OpenOCD installing with ST-LINK V3 support:
+   https://mbd.kleier.net/integrating-st-link-v3.html
+
+.. _STM32CubeIDE:
+   https://www.st.com/en/development-tools/stm32cubeide.html
+
+.. _STM32CubeProgrammer:
+   https://www.st.com/en/development-tools/stm32cubeprog.html
diff --git a/boards/st/nucleo_h7s3l8/nucleo_h7s3l8.dts b/boards/st/nucleo_h7s3l8/nucleo_h7s3l8.dts
new file mode 100644
index 00000000000..e5d817bea57
--- /dev/null
+++ b/boards/st/nucleo_h7s3l8/nucleo_h7s3l8.dts
@@ -0,0 +1,141 @@
+/*
+ * Copyright (c) 2024 STMicroelectronics
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/dts-v1/;
+#include <st/h7rs/stm32h7s3X8.dtsi>
+#include <st/h7/stm32h7s3l8hx-pinctrl.dtsi>
+#include "arduino_r3_connector.dtsi"
+#include <zephyr/dt-bindings/input/input-event-codes.h>
+
+/ {
+	model = "STMicroelectronics STM32H7S3L8-NUCLEO board";
+	compatible = "st,stm32h7s3l8-nucleo";
+
+	chosen {
+		zephyr,console = &usart3;
+		zephyr,shell-uart = &usart3;
+		zephyr,dtcm = &dtcm;
+		zephyr,sram = &sram0;
+		zephyr,flash = &flash0;
+	};
+
+	leds: leds {
+		compatible = "gpio-leds";
+		green_led: led_1 {
+			gpios = <&gpiod 10 GPIO_ACTIVE_HIGH>;
+			label = "User LD1";
+		};
+		yellow_led: led_2 {
+			gpios = <&gpiod 13 GPIO_ACTIVE_HIGH>;
+			label = "User LD2";
+		};
+		red_led: led_3 {
+			gpios = <&gpiob 7 GPIO_ACTIVE_HIGH>;
+			label = "User LD3";
+		};
+	};
+
+	gpio_keys {
+		compatible = "gpio-keys";
+		user_button: button_0 {
+			label = "User";
+			gpios = <&gpioc 13 GPIO_ACTIVE_HIGH>;
+			zephyr,code = <INPUT_KEY_0>;
+		};
+	};
+
+	aliases {
+		led0 = &green_led;
+		led1 = &yellow_led;
+		led2 = &red_led;
+		sw0 = &user_button;
+		watchdog0 = &iwdg;
+	};
+};
+
+&clk_lsi {
+	status = "disabled";
+};
+
+&clk_hsi48 {
+	status = "disabled";
+};
+
+&clk_hse {
+	clock-frequency = <DT_FREQ_M(24)>;
+	status = "okay";
+};
+
+&clk_lse {
+	status = "okay";
+};
+
+&pll {
+	div-m = <12>;
+	mul-n = <200>;
+	div-p = <2>;
+	div-q = <2>;
+	div-r = <2>;
+	div-s = <2>;
+	div-t = <2>;
+	clocks = <&clk_hse>;
+	status = "okay";
+};
+
+&rcc {
+	clocks = <&pll>;
+	clock-frequency = <DT_FREQ_M(200)>;
+	dcpre = <1>;
+	hpre = <1>;
+	ppre1 = <2>;
+	ppre2 = <2>;
+	ppre4 = <2>;
+	ppre5 = <2>;
+};
+
+&usart1 {
+	pinctrl-0 = <&usart1_tx_pb14 &usart1_rx_pa10>;
+	pinctrl-names = "default";
+	current-speed = <115200>;
+	status = "okay";
+};
+
+&usart3 {
+	pinctrl-0 = <&usart3_tx_pd8 &usart3_rx_pd9>;
+	pinctrl-names = "default";
+	current-speed = <115200>;
+	status = "okay";
+};
+
+&iwdg {
+	status = "okay";
+};
+
+&wwdg {
+	status = "okay";
+};
+
+&adc1 {
+	pinctrl-0 = <&adc1_inp15_pa3>; /* Arduino A0 */
+	pinctrl-names = "default";
+	st,adc-clock-source = "SYNC";
+	st,adc-prescaler = <4>;
+	status = "okay";
+};
+
+&spi1 {
+	status = "okay";
+	pinctrl-0 = <&spi1_sck_pa5 &spi1_miso_pa6 &spi1_mosi_pb5>;
+	pinctrl-names = "default";
+	cs-gpios = <&gpiod 14 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
+};
+
+&i2c1 {
+	pinctrl-0 = <&i2c1_scl_pb8 &i2c1_sda_pb9>;
+	pinctrl-names = "default";
+	status = "okay";
+	clock-frequency = <I2C_BITRATE_FAST>;
+};
diff --git a/boards/st/nucleo_h7s3l8/nucleo_h7s3l8.yaml b/boards/st/nucleo_h7s3l8/nucleo_h7s3l8.yaml
new file mode 100644
index 00000000000..f7b72a70d92
--- /dev/null
+++ b/boards/st/nucleo_h7s3l8/nucleo_h7s3l8.yaml
@@ -0,0 +1,15 @@
+identifier: nucleo_h7s3l8
+name: ST Nucleo H7S3L8 nucleo
+type: mcu
+arch: arm
+toolchain:
+  - zephyr
+ram: 640
+flash: 64
+supported:
+  - gpio
+  - uart
+  - watchdog
+  - entropy
+  - adc
+vendor: st
diff --git a/boards/st/nucleo_h7s3l8/nucleo_h7s3l8_defconfig b/boards/st/nucleo_h7s3l8/nucleo_h7s3l8_defconfig
new file mode 100644
index 00000000000..3ed77fa885c
--- /dev/null
+++ b/boards/st/nucleo_h7s3l8/nucleo_h7s3l8_defconfig
@@ -0,0 +1,21 @@
+# Copyright (c) 2024 STMicroelectronics
+# SPDX-License-Identifier: Apache-2.0
+
+# Disable SMPS
+CONFIG_POWER_SUPPLY_DIRECT_SMPS=n
+
+# Enable MPU
+CONFIG_ARM_MPU=y
+
+# Enable HW stack protection
+CONFIG_HW_STACK_PROTECTION=y
+
+# Enable UART driver
+CONFIG_SERIAL=y
+
+# Enable console
+CONFIG_CONSOLE=y
+CONFIG_UART_CONSOLE=y
+
+# Enable GPIO
+CONFIG_GPIO=y
diff --git a/boards/st/nucleo_h7s3l8/support/openocd.cfg b/boards/st/nucleo_h7s3l8/support/openocd.cfg
new file mode 100644
index 00000000000..af84952d31d
--- /dev/null
+++ b/boards/st/nucleo_h7s3l8/support/openocd.cfg
@@ -0,0 +1,42 @@
+
+source [find interface/stlink-dap.cfg]
+transport select "dapdirect_swd"
+
+set WORKAREASIZE 0x8000
+set CHIPNAME STM32H7S3XX
+set BOARDNAME NUCLEO-H7S3L8
+
+# Enable debug when in low power modes
+set ENABLE_LOW_POWER 1
+
+# Stop Watchdog counters when halt
+set STOP_WATCHDOG 1
+
+# Reset configuration
+# use hardware reset, connect under reset
+# connect_assert_srst needed if low power mode application running (WFI...)
+# reset_config srst_only srst_nogate connect_assert_srst
+
+#set CONNECT_UNDER_RESET 1
+#set CORE_RESET 0
+
+source [find target/stm32h7rx.cfg]
+
+
+$_CHIPNAME.cpu0 configure -event gdb-attach {
+        echo "Debugger attaching: halting execution"
+        gdb_breakpoint_override hard
+}
+
+$_CHIPNAME.cpu0 configure -event gdb-detach {
+        echo "Debugger detaching: resuming execution"
+        resume
+}
+
+# Due to the use of connect_assert_srst, running gdb requires
+# to reset halt just after openocd init.
+rename init old_init
+proc init {} {
+        old_init
+        reset halt
+}