From 004e00a0bd0551a49c2d9c9045a0064289e2f155 Mon Sep 17 00:00:00 2001 From: Jimmy Zheng Date: Mon, 26 Jun 2023 17:36:02 +0800 Subject: [PATCH] soc: riscv: andes_v5: add RV32E_CPU option Add CONFIG_RV32E_CPU for AE350 platform integrated with Andes RV32E core, such as N22, D23 core. Signed-off-by: Jimmy Zheng --- soc/riscv/riscv-privileged/andes_v5/Kconfig.soc | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/soc/riscv/riscv-privileged/andes_v5/Kconfig.soc b/soc/riscv/riscv-privileged/andes_v5/Kconfig.soc index 376abcb4697..b201e5a338e 100644 --- a/soc/riscv/riscv-privileged/andes_v5/Kconfig.soc +++ b/soc/riscv/riscv-privileged/andes_v5/Kconfig.soc @@ -28,6 +28,12 @@ config RV32I_CPU select RISCV_ISA_EXT_ZICSR select RISCV_ISA_EXT_ZIFENCEI +config RV32E_CPU + bool "RISCV32E CPU ISA" + select RISCV_ISA_RV32E + select RISCV_ISA_EXT_ZICSR + select RISCV_ISA_EXT_ZIFENCEI + config RV64I_CPU bool "RISCV64 CPU ISA" select RISCV_ISA_RV64I